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docs: Fix repo file links

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Krystine Sherwin 2024-03-19 05:55:45 +13:00 • committed by KrystalDelusion
parent 29c8a3bef9
commit f72ddfb09d
9 changed files with 12 additions and 12 deletions
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2
docs/source/using_yosys/synthesis/cell_libs.rst
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@ -21,7 +21,7 @@ detail in the :doc:`/getting_started/example_synth` document.
To learn more about these commands, check out :ref:`interactive_show`.
.. _example project: https://github.com/YosysHQ/yosys/tree/krys/docs/docs/source/code_examples/intro
.. _example project: https://github.com/YosysHQ/yosys/tree/master/docs/source/code_examples/intro
A simple counter
~~~~~~~~~~~~~~~~

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docs/source/using_yosys/synthesis/extract.rst
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@ -15,7 +15,7 @@ The extract pass
Example code can be found in |code_examples/macc|_.
.. |code_examples/macc| replace:: :file:`docs/source/code_examples/macc`
.. _code_examples/macc: https://github.com/YosysHQ/yosys/tree/krys/docs/docs/source/code_examples/macc
.. _code_examples/macc: https://github.com/YosysHQ/yosys/tree/master/docs/source/code_examples/macc
.. literalinclude:: /code_examples/macc/macc_simple_test.ys

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docs/source/using_yosys/synthesis/memory.rst
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@ -36,7 +36,7 @@ Example
|code_examples/synth_flow|_.
.. |code_examples/synth_flow| replace:: :file:`docs/source/code_examples/synth_flow`
.. _code_examples/synth_flow: https://github.com/YosysHQ/yosys/tree/krys/docs/docs/source/code_examples/synth_flow
.. _code_examples/synth_flow: https://github.com/YosysHQ/yosys/tree/master/docs/source/code_examples/synth_flow
.. figure:: /_images/code_examples/synth_flow/memory_01.*
:class: width-helper

2
docs/source/using_yosys/synthesis/proc.rst
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@ -31,7 +31,7 @@ Example
|code_examples/synth_flow|_.
.. |code_examples/synth_flow| replace:: :file:`docs/source/code_examples/synth_flow`
.. _code_examples/synth_flow: https://github.com/YosysHQ/yosys/tree/krys/docs/docs/source/code_examples/synth_flow
.. _code_examples/synth_flow: https://github.com/YosysHQ/yosys/tree/master/docs/source/code_examples/synth_flow
.. literalinclude:: /code_examples/synth_flow/proc_01.v
:language: verilog