mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-13 04:28:18 +00:00
Code Activity

printattrs: Refactor indentation string building for clarity.

Browse source 
Co-Authored-By: whitequark <whitequark@whitequark.org>
This commit is contained in:
Alberto Gonzalez 2020-05-27 23:15:07 +00:00
parent 6228b10c9f
commit f671c99cb8
No known key found for this signature in database
GPG key ID: 8395A8BA109708B2
1 changed files with 11 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

16
passes/cmds/printattrs.cc
View file

@ -35,11 +35,17 @@ struct PrintAttrsPass : public Pass {
log("\n"); log("\n");
} }
static std::string get_indent_str(const unsigned int indent) {
//Build the format string (e.g. "%4s")
std::string format_str = stringf("%%%ds", indent);
return stringf(format_str.c_str(), " "); //Use the format string with " " as %s
}
static void log_const(const RTLIL::IdString &s, const RTLIL::Const &x, const unsigned int indent) { static void log_const(const RTLIL::IdString &s, const RTLIL::Const &x, const unsigned int indent) {
if (x.flags == RTLIL::CONST_FLAG_STRING) if (x.flags == RTLIL::CONST_FLAG_STRING)
log("%s(* %s=\"%s\" *)\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(s), x.decode_string().c_str()); log("%s(* %s=\"%s\" *)\n", get_indent_str(indent).c_str(), log_id(s), x.decode_string().c_str());
else if (x.flags == RTLIL::CONST_FLAG_NONE) else if (x.flags == RTLIL::CONST_FLAG_NONE)
log("%s(* %s=%s *)\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(s), x.as_string().c_str()); log("%s(* %s=%s *)\n", get_indent_str(indent).c_str(), log_id(s), x.as_string().c_str());
else else
log_assert(x.flags == RTLIL::CONST_FLAG_STRING || x.flags == RTLIL::CONST_FLAG_NONE); //intended to fail log_assert(x.flags == RTLIL::CONST_FLAG_STRING || x.flags == RTLIL::CONST_FLAG_NONE); //intended to fail
} }
@ -53,14 +59,14 @@ struct PrintAttrsPass : public Pass {
for (auto mod : design->selected_modules()) for (auto mod : design->selected_modules())
{ {
if (design->selected_whole_module(mod)) { if (design->selected_whole_module(mod)) {
log("%s%s\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(mod->name)); log("%s%s\n", get_indent_str(indent).c_str(), log_id(mod->name));
indent += 2; indent += 2;
for (auto &it : mod->attributes) for (auto &it : mod->attributes)
log_const(it.first, it.second, indent); log_const(it.first, it.second, indent);
} }
for (auto cell : mod->selected_cells()) { for (auto cell : mod->selected_cells()) {
log("%s%s\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(cell->name)); log("%s%s\n", get_indent_str(indent).c_str(), log_id(cell->name));
indent += 2; indent += 2;
for (auto &it : cell->attributes) for (auto &it : cell->attributes)
log_const(it.first, it.second, indent); log_const(it.first, it.second, indent);
@ -68,7 +74,7 @@ struct PrintAttrsPass : public Pass {
} }
for (auto wire : mod->selected_wires()) { for (auto wire : mod->selected_wires()) {
log("%s%s\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(wire->name)); log("%s%s\n", get_indent_str(indent).c_str(), log_id(wire->name));
indent += 2; indent += 2;
for (auto &it : wire->attributes) for (auto &it : wire->attributes)
log_const(it.first, it.second, indent); log_const(it.first, it.second, indent);