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Switched abc "clock domain not found" error to log_cmd_error()

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This commit is contained in:
Clifford Wolf 2017-06-20 04:22:34 +02:00
parent 8f8baccfde
commit f6421c83a2
1 changed files with 28 additions and 24 deletions
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52
passes/techmap/abc.cc
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@ -621,6 +621,30 @@ void abc_module(RTLIL::Design *design, RTLIL::Module *current_module, std::strin
en_sig = RTLIL::SigSpec(); en_sig = RTLIL::SigSpec();
} }
if (!clk_str.empty() && clk_str != "$")
{
if (clk_str.find(',') != std::string::npos) {
int pos = clk_str.find(',');
std::string en_str = clk_str.substr(pos+1);
clk_str = clk_str.substr(0, pos);
if (en_str[0] == '!') {
en_polarity = false;
en_str = en_str.substr(1);
}
if (module->wires_.count(RTLIL::escape_id(en_str)) != 0)
en_sig = assign_map(RTLIL::SigSpec(module->wires_.at(RTLIL::escape_id(en_str)), 0));
}
if (clk_str[0] == '!') {
clk_polarity = false;
clk_str = clk_str.substr(1);
}
if (module->wires_.count(RTLIL::escape_id(clk_str)) != 0)
clk_sig = assign_map(RTLIL::SigSpec(module->wires_.at(RTLIL::escape_id(clk_str)), 0));
}
if (dff_mode && clk_sig.empty())
log_cmd_error("Clock domain %s not found.\n", clk_str.c_str());
std::string tempdir_name = "/tmp/yosys-abc-XXXXXX"; std::string tempdir_name = "/tmp/yosys-abc-XXXXXX";
if (!cleanup) if (!cleanup)
tempdir_name[0] = tempdir_name[4] = '_'; tempdir_name[0] = tempdir_name[4] = '_';
@ -693,30 +717,6 @@ void abc_module(RTLIL::Design *design, RTLIL::Module *current_module, std::strin
fprintf(f, "%s\n", abc_script.c_str()); fprintf(f, "%s\n", abc_script.c_str());
fclose(f); fclose(f);
if (!clk_str.empty() && clk_str != "$")
{
if (clk_str.find(',') != std::string::npos) {
int pos = clk_str.find(',');
std::string en_str = clk_str.substr(pos+1);
clk_str = clk_str.substr(0, pos);
if (en_str[0] == '!') {
en_polarity = false;
en_str = en_str.substr(1);
}
if (module->wires_.count(RTLIL::escape_id(en_str)) != 0)
en_sig = assign_map(RTLIL::SigSpec(module->wires_.at(RTLIL::escape_id(en_str)), 0));
}
if (clk_str[0] == '!') {
clk_polarity = false;
clk_str = clk_str.substr(1);
}
if (module->wires_.count(RTLIL::escape_id(clk_str)) != 0)
clk_sig = assign_map(RTLIL::SigSpec(module->wires_.at(RTLIL::escape_id(clk_str)), 0));
}
if (dff_mode && clk_sig.empty())
log_error("Clock domain %s not found.\n", clk_str.c_str());
if (dff_mode || !clk_str.empty()) if (dff_mode || !clk_str.empty())
{ {
if (clk_sig.size() == 0) if (clk_sig.size() == 0)
@ -1369,6 +1369,10 @@ struct AbcPass : public Pass {
log_header(design, "Executing ABC pass (technology mapping using ABC).\n"); log_header(design, "Executing ABC pass (technology mapping using ABC).\n");
log_push(); log_push();
assign_map.clear();
signal_list.clear();
signal_map.clear();
#ifdef ABCEXTERNAL #ifdef ABCEXTERNAL
std::string exe_file = ABCEXTERNAL; std::string exe_file = ABCEXTERNAL;
#else #else