From f56d90c9c2f8aa61bf144949139a4ea60e19486b Mon Sep 17 00:00:00 2001
From: "Emil J. Tywoniak" <emil@tywoniak.eu>
Date: Wed, 22 Jul 2026 00:05:24 +0200
Subject: [PATCH] extract: signorm fix

---
 passes/techmap/extract.cc | 17 ++++++-----------
 1 file changed, 6 insertions(+), 11 deletions(-)

diff --git a/passes/techmap/extract.cc b/passes/techmap/extract.cc
index 0ef50a905..7462a59c9 100644
--- a/passes/techmap/extract.cc
+++ b/passes/techmap/extract.cc
@@ -184,6 +184,8 @@ bool module2graph(SubCircuit::Graph &graph, RTLIL::Module *mod, bool constports,
 	if (max_fanout > 0)
 		for (auto cell : mod->cells())
 		{
+			if (cell->type == TW($input_port))
+				continue;
 			if (!sel || sel->selected(mod, cell))
 				for (auto &conn : cell->connections()) {
 					RTLIL::SigSpec conn_sig = conn.second;
@@ -199,6 +201,8 @@ bool module2graph(SubCircuit::Graph &graph, RTLIL::Module *mod, bool constports,
 	{
 		if (sel && !sel->selected(mod, cell))
 			continue;
+		if (cell->type == TW($input_port))
+			continue;
 
 		std::string type = cell->type.str();
 		if (sel == nullptr && type.compare(0, 2, "\\$") == 0)
@@ -253,6 +257,8 @@ bool module2graph(SubCircuit::Graph &graph, RTLIL::Module *mod, bool constports,
 	// mark external signals (used in non-selected cells)
 	for (auto cell : mod->cells())
 	{
+		if (cell->type == TW($input_port))
+			continue;
 		if (sel && !sel->selected(mod, cell))
 			for (auto &conn : cell->connections())
 			{
@@ -565,13 +571,6 @@ struct ExtractPass : public Pass {
 		}
 		extra_args(args, argidx, design);
 
-		// Subgraph isomorphism is over the cells as they stand, so the index's
-		// own marker cells would have to appear in both needle and haystack
-		// for a match: a needle input is a module port, hence an $input_port
-		// node, where the haystack has whatever actually drives the net.
-		// Nothing would ever match again.
-		design->sigNormalize(false);
-
 		if (!nodefaultswaps) {
 			solver.addSwappablePorts("$and",       "\\A", "\\B");
 			solver.addSwappablePorts("$or",        "\\A", "\\B");
@@ -625,10 +624,6 @@ struct ExtractPass : public Pass {
 					if (filename.size() <= 3 || filename.compare(filename.size()-3, std::string::npos, ".il") != 0) {
 						Pass::call(map, "proc");
 						Pass::call(map, "opt_clean");
-						// Those leave the map design indexed, and the needles
-						// are built from its cells; see the note by the
-						// sigNormalize call on the haystack design above.
-						map->sigNormalize(false);
 					}
 				}
 			}