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Add "whitebox" attribute, add "read_verilog -wb"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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23 changed files with 81 additions and 42 deletions
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@ -664,7 +664,7 @@ struct DfflibmapPass : public Pass {
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logmap_all();
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for (auto &it : design->modules_)
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if (design->selected(it.second) && !it.second->get_bool_attribute("\\blackbox"))
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if (design->selected(it.second) && !it.second->get_blackbox_attribute())
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dfflibmap(design, it.second, prepare_mode);
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cell_mappings.clear();
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