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Added $eq/$neq -> $logic_not/$reduce_bool optimization
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4 changed files with 38 additions and 1 deletions
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@ -3000,6 +3000,21 @@ bool RTLIL::SigSpec::is_fully_const() const
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return true;
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}
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bool RTLIL::SigSpec::is_fully_zero() const
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{
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cover("kernel.rtlil.sigspec.is_fully_zero");
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pack();
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for (auto it = chunks_.begin(); it != chunks_.end(); it++) {
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if (it->width > 0 && it->wire != NULL)
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return false;
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for (size_t i = 0; i < it->data.size(); i++)
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if (it->data[i] != RTLIL::State::S0)
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return false;
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}
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return true;
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}
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bool RTLIL::SigSpec::is_fully_def() const
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{
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cover("kernel.rtlil.sigspec.is_fully_def");
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