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Generalise structs and add support for packed unions.

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Peter Crozier 2020-05-12 14:25:33 +01:00
parent 0b6b47ca67
commit f482c9c016
8 changed files with 209 additions and 59 deletions
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README.md
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@ -556,7 +556,7 @@ from SystemVerilog:
- enums are supported (including inside packages)
- but are currently not strongly typed
- structs are supported
- packed structs and unions are supported.
- SystemVerilog interfaces (SVIs) are supported. Modports for specifying whether
ports are inputs or outputs are supported.