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Update Xilinx cell definitions, fixes #3699

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This commit is contained in:
Miodrag Milanovic 2023-03-21 08:53:22 +01:00 • committed by myrtle
parent 23826e5152
commit f35bdaa527
3 changed files with 16 additions and 6 deletions
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11
techlibs/xilinx/cells_sim.v
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@ -33,8 +33,12 @@ module IBUF(
output O,
(* iopad_external_pin *)
input I);
parameter IOSTANDARD = "default";
parameter IBUF_LOW_PWR = 0;
parameter CCIO_EN = "TRUE";
parameter CAPACITANCE = "DONT_CARE";
parameter IBUF_DELAY_VALUE = "0";
parameter IBUF_LOW_PWR = "TRUE";
parameter IFD_DELAY_VALUE = "AUTO";
parameter IOSTANDARD = "DEFAULT";
assign O = I;
specify
(I => O) = 0;
@ -56,7 +60,8 @@ module OBUF(
(* iopad_external_pin *)
output O,
input I);
parameter IOSTANDARD = "default";
parameter CAPACITANCE = "DONT_CARE";
parameter IOSTANDARD = "DEFAULT";
parameter DRIVE = 12;
parameter SLEW = "SLOW";
assign O = I;