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ice40: Adapt the relut process passes to the new $lut <=> SB_LUT4 port map
The new mapping introduced in 437fec0d88
needed matching adaptation when converting and optimizing LUTs during
the relut process
Fixes #1187
(Diagnosis of the issue by @daveshah1 on IRC)
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
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parent
5939b5d636
commit
f28e38de99
2 changed files with 4 additions and 4 deletions
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@ -56,10 +56,10 @@ static void run_ice40_unlut(Module *module)
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cell->unsetParam("\\LUT_INIT");
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cell->setPort("\\A", SigSpec({
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get_bit_or_zero(cell->getPort("\\I3")),
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get_bit_or_zero(cell->getPort("\\I2")),
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get_bit_or_zero(cell->getPort("\\I0")),
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get_bit_or_zero(cell->getPort("\\I1")),
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get_bit_or_zero(cell->getPort("\\I0"))
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get_bit_or_zero(cell->getPort("\\I2")),
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get_bit_or_zero(cell->getPort("\\I3"))
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}));
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cell->setPort("\\Y", cell->getPort("\\O")[0]);
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cell->unsetPort("\\I0");
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