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Implemented basic functionality of "extract" pass
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3 changed files with 87 additions and 15 deletions
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@ -141,6 +141,16 @@ static void rmunused_module_signals(RTLIL::Module *module)
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used_signals_nodrivers.add(it2.second);
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}
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}
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for (auto &it : module->wires) {
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RTLIL::Wire *wire = it.second;
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if (wire->port_id > 0) {
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RTLIL::SigSpec sig = RTLIL::SigSpec(wire);
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assign_map.apply(sig);
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used_signals.add(sig);
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if (!wire->port_input)
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used_signals_nodrivers.add(sig);
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}
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}
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std::vector<RTLIL::Wire*> del_wires;
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for (auto &it : module->wires) {
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