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rtlil: evacuate src_id_ from AttrObject to per-Design meta vector

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This commit is contained in:
Emil J. Tywoniak 2026-06-05 14:15:51 +02:00
parent e70eed3296
commit f1edb571f2
22 changed files with 668 additions and 390 deletions
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2
passes/techmap/abc.cc
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@ -1552,7 +1552,7 @@ void AbcModuleState::extract(AbcSigMap &assign_map, RTLIL::Design *design, RTLIL
RTLIL::Wire *orig_wire = nullptr;
RTLIL::Wire *wire = module->addWire(remap_name(w->name, &orig_wire));
if (orig_wire != nullptr && orig_wire->src_id() != Twine::Null && module->design)
wire->set_src_id(&module->design->src_twines, orig_wire->src_id());
wire->set_src_id(orig_wire->src_id());
if (markgroups) wire->attributes[ID::abcgroup] = map_autoidx;
design->select(module, wire);
}

2
passes/techmap/simplemap.cc
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@ -29,7 +29,7 @@ YOSYS_NAMESPACE_BEGIN
static void transfer_src (Cell* to, const Cell* from) {
if (from->src_id() != Twine::Null && to->module && to->module->design)
to->set_src_id(&to->module->design->src_twines, from->src_id());
to->set_src_id(from->src_id());
}
void simplemap_not(RTLIL::Module *module, RTLIL::Cell *cell)