From eed3bc243f1e17812604eacafbc02b111f64ceb3 Mon Sep 17 00:00:00 2001
From: Miodrag Milanovic <mmicko@gmail.com>
Date: Wed, 2 Jul 2025 11:54:19 +0200
Subject: [PATCH] verific: enable replacing const exprs in static elaboration
 by default

---
 frontends/verific/verific.cc | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc
index d12f8a5a5..d83db3410 100644
--- a/frontends/verific/verific.cc
+++ b/frontends/verific/verific.cc
@@ -3465,11 +3465,13 @@ struct VerificPass : public Pass {
 			RuntimeFlags::SetVar("veri_extract_dualport_rams", 0);
 			RuntimeFlags::SetVar("veri_extract_multiport_rams", 1);
 			RuntimeFlags::SetVar("veri_allow_any_ram_in_loop", 1);
+			RuntimeFlags::SetVar("veri_replace_const_exprs", 1);
 #endif
 #ifdef VERIFIC_VHDL_SUPPORT
 			RuntimeFlags::SetVar("vhdl_extract_dualport_rams", 0);
 			RuntimeFlags::SetVar("vhdl_extract_multiport_rams", 1);
 			RuntimeFlags::SetVar("vhdl_allow_any_ram_in_loop", 1);
+			RuntimeFlags::SetVar("vhdl_replace_const_exprs", 1);
 
 			RuntimeFlags::SetVar("vhdl_support_variable_slice", 1);
 			RuntimeFlags::SetVar("vhdl_ignore_assertion_statements", 0);