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Alain Dargelas 2024-11-10 09:03:51 -08:00
parent 21034a0b0a
commit ee8d9e74ac
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passes/cmds/splitnetlist.cc
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@ -102,6 +102,7 @@ void lhs2rhs(RTLIL::Design *design, dict<RTLIL::SigSpec, RTLIL::SigSpec> &lhsSig
continue;
}
if (!lhs.is_chunk()) {
// If lhs is not a chunk (leaf) ie: assign {a,b} = ..., then bitblast both lhs and rhs
std::vector<SigSpec> lhsBits;
for (int i = 0; i < lhs.size(); i++) {
SigSpec bit_sig = lhs.extract(i, 1);