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xilinx: Rework labels for faster Verilator testing

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Signed-off-by: David Shah <dave@ds0.me>
This commit is contained in:
David Shah 2019-08-13 10:29:42 +01:00
parent f890cfb63b
commit edff79a25a
1 changed files with 5 additions and 1 deletions
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6
techlibs/xilinx/synth_xilinx.cc
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@ -255,7 +255,7 @@ struct SynthXilinxPass : public ScriptPass
run(stringf("hierarchy -check %s", top_opt.c_str()));
}
if (check_label("coarse")) {
if (check_label("prepare")) {
run("proc");
if (flatten || help_mode)
run("flatten", "(with '-flatten')");
@ -283,7 +283,9 @@ struct SynthXilinxPass : public ScriptPass
}
run("techmap -map +/cmp2lut.v -D LUT_WIDTH=6");
}
if (check_label("dsp")) {
if (!nodsp || help_mode) {
// NB: Xilinx multipliers are signed only
run("techmap -map +/mul2dsp.v -map +/xilinx/dsp_map.v -D DSP_A_MAXWIDTH=25 -D DSP_B_MAXWIDTH=18 -D DSP_SIGNEDONLY=1 -D DSP_NAME=$__MUL25X18", "(skip if '-nodsp')");
@ -292,7 +294,9 @@ struct SynthXilinxPass : public ScriptPass
run("xilinx_dsp", " (skip if '-nodsp')");
run("chtype -set $mul t:$__soft_mul"," (skip if '-nodsp')");
}
}
if (check_label("coarse")) {
run("alumacc");
run("share");
run("opt");