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Add -on/-off modes to debug pass

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Natalia 2026-01-15 12:07:26 -08:00
parent 967b47d984
commit ed64df737b
2 changed files with 44 additions and 1 deletions
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tests/various/debugon.ys Normal file
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# Test debug -on/-off modes
design -reset
read_verilog <<EOT
module top(input a, input b, output y);
assign y = a & b;
endmodule
EOT
debug -on
hierarchy
select -assert-count 1 t:$and
debug -off