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Add assign PCOUT = P to DSP48E1

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This commit is contained in:
Eddie Hung 2019-08-13 12:19:26 -07:00
parent 0597a3ea23
commit ed4b2834ef
1 changed files with 2 additions and 0 deletions
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techlibs/xilinx/cells_sim.v
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@ -784,4 +784,6 @@ module DSP48E1 (
end
endgenerate
assign PCOUT = P;
endmodule