mirror of
https://github.com/YosysHQ/yosys
synced 2025-08-30 06:50:09 +00:00
Add a xilinx_dsp_cascade matcher for PCIN -> PCOUT
This commit is contained in:
parent
1844498c5f
commit
ed187ef1cf
4 changed files with 104 additions and 53 deletions
|
@ -22,8 +22,9 @@ $(eval $(call add_extra_objs,passes/pmgen/ice40_wrapcarry_pm.h))
|
|||
# --------------------------------------
|
||||
|
||||
OBJS += passes/pmgen/xilinx_dsp.o
|
||||
passes/pmgen/xilinx_dsp.o: passes/pmgen/xilinx_dsp_pm.h
|
||||
passes/pmgen/xilinx_dsp.o: passes/pmgen/xilinx_dsp_pm.h passes/pmgen/xilinx_dsp_cascade_pm.h
|
||||
$(eval $(call add_extra_objs,passes/pmgen/xilinx_dsp_pm.h))
|
||||
$(eval $(call add_extra_objs,passes/pmgen/xilinx_dsp_cascade_pm.h))
|
||||
|
||||
# --------------------------------------
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue