From ecd289c10011f06aecb77b8c3961467f274c9d00 Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Tue, 23 May 2023 08:25:08 +0200 Subject: [PATCH] Fix importing parametrized VHDL entity --- frontends/verific/verific.cc | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index bc61c9c82..5d93954a7 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -2468,6 +2468,7 @@ std::string verific_import(Design *design, const std::mapAddAtt(new Att(" \\top", NULL)); nl_todo.emplace(nl->CellBaseName(), nl); + cell_name = nl->Owner()->Name(); } + if (top.empty()) cell_name = top; delete netlists; @@ -2495,7 +2498,7 @@ std::string verific_import(Design *design, const std::mapfirst) == 0) { VerificImporter importer(false, false, false, false, false, false, false); nl_done[it->first] = it->second; - importer.import_netlist(design, nl, nl_todo, nl->Owner()->Name() == top); + importer.import_netlist(design, nl, nl_todo, nl->Owner()->Name() == cell_name); } nl_todo.erase(it); }