mirror of
				https://github.com/YosysHQ/yosys
				synced 2025-10-31 03:32:29 +00:00 
			
		
		
		
	Fix constant args used with function ports split across declarations
This commit is contained in:
		
							parent
							
								
									082cbcb4c7
								
							
						
					
					
						commit
						ecc5c23b4d
					
				
					 2 changed files with 24 additions and 3 deletions
				
			
		|  | @ -3211,14 +3211,15 @@ skip_dynamic_range_lvalue_expansion:; | ||||||
| 				if (wire_cache.count(child->str)) | 				if (wire_cache.count(child->str)) | ||||||
| 				{ | 				{ | ||||||
| 					wire = wire_cache.at(child->str); | 					wire = wire_cache.at(child->str); | ||||||
| 					if (wire->children.empty()) { | 					bool contains_value = wire->type == AST_LOCALPARAM; | ||||||
|  | 					if (wire->children.size() == contains_value) { | ||||||
| 						for (auto c : child->children) | 						for (auto c : child->children) | ||||||
| 							wire->children.push_back(c->clone()); | 							wire->children.push_back(c->clone()); | ||||||
| 					} else if (!child->children.empty()) { | 					} else if (!child->children.empty()) { | ||||||
| 						while (child->simplify(true, false, false, stage, -1, false, false)) { } | 						while (child->simplify(true, false, false, stage, -1, false, false)) { } | ||||||
| 						if (GetSize(child->children) == GetSize(wire->children)) { | 						if (GetSize(child->children) == GetSize(wire->children) - contains_value) { | ||||||
| 							for (int i = 0; i < GetSize(child->children); i++) | 							for (int i = 0; i < GetSize(child->children); i++) | ||||||
| 								if (*child->children.at(i) != *wire->children.at(i)) | 								if (*child->children.at(i) != *wire->children.at(i + contains_value)) | ||||||
| 									goto tcall_incompatible_wires; | 									goto tcall_incompatible_wires; | ||||||
| 						} else { | 						} else { | ||||||
| 					tcall_incompatible_wires: | 					tcall_incompatible_wires: | ||||||
|  |  | ||||||
|  | @ -23,6 +23,22 @@ module top; | ||||||
| 		end | 		end | ||||||
| 	endfunction | 	endfunction | ||||||
| 
 | 
 | ||||||
|  | 	function automatic [31:0] operation3; | ||||||
|  | 		input [4:0] rounds; | ||||||
|  | 		input integer num; | ||||||
|  | 		reg [4:0] rounds; | ||||||
|  | 		integer i; | ||||||
|  | 		begin | ||||||
|  | 			begin : shadow | ||||||
|  | 				integer rounds; | ||||||
|  | 				rounds = 0; | ||||||
|  | 			end | ||||||
|  | 			for (i = 0; i < rounds; i = i + 1) | ||||||
|  | 				num = num * 2; | ||||||
|  | 			operation3 = num; | ||||||
|  | 		end | ||||||
|  | 	endfunction | ||||||
|  | 
 | ||||||
| 	wire [31:0] a; | 	wire [31:0] a; | ||||||
| 	assign a = 2; | 	assign a = 2; | ||||||
| 
 | 
 | ||||||
|  | @ -34,11 +50,15 @@ module top; | ||||||
| 	wire [31:0] x2; | 	wire [31:0] x2; | ||||||
| 	assign x2 = operation2(A, a); | 	assign x2 = operation2(A, a); | ||||||
| 
 | 
 | ||||||
|  | 	wire [31:0] x3; | ||||||
|  | 	assign x3 = operation3(A, a); | ||||||
|  | 
 | ||||||
| // `define VERIFY
 | // `define VERIFY
 | ||||||
| `ifdef VERIFY | `ifdef VERIFY | ||||||
|     assert property (a == 2); |     assert property (a == 2); | ||||||
|     assert property (A == 3); |     assert property (A == 3); | ||||||
|     assert property (x1 == 16); |     assert property (x1 == 16); | ||||||
|     assert property (x2 == 4); |     assert property (x2 == 4); | ||||||
|  |     assert property (x3 == 16); | ||||||
| `endif | `endif | ||||||
| endmodule | endmodule | ||||||
|  |  | ||||||
		Loading…
	
	Add table
		Add a link
		
	
		Reference in a new issue