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Support module/package/interface/block scope for typedef names.

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This commit is contained in:
Peter Crozier 2020-03-23 20:07:22 +00:00
parent b86905d952
commit ecc22f7fed
6 changed files with 64 additions and 23 deletions
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3
frontends/verilog/verilog_frontend.cc
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@ -51,7 +51,6 @@ static void add_package_types(std::map<std::string, AST::AstNode *> &user_types,
{
// prime the parser's user type lookup table with the package qualified names
// of typedefed names in the packages seen so far.
user_types.clear();
for (const auto &pkg : package_list) {
log_assert(pkg->type==AST::AST_PACKAGE);
for (const auto &node: pkg->children) {
@ -61,6 +60,8 @@ static void add_package_types(std::map<std::string, AST::AstNode *> &user_types,
}
}
}
user_type_stack.clear();
user_type_stack.push_back(new UserTypeMap());
}
struct VerilogFrontend : public Frontend {