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Merge pull request #159 from azonenberg/master

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Fixes to use new I/O pad techmapping, renamed ports for GP_SHREG
This commit is contained in:
Clifford Wolf 2016-05-05 18:18:48 +02:00
commit ec1938737b
5 changed files with 7 additions and 24 deletions
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2
passes/techmap/shregmap.cc
View file

@ -82,7 +82,7 @@ struct ShregmapTechGreenpak4 : ShregmapTech
int i = 0; int i = 0;
for (auto tap : taps) { for (auto tap : taps) {
newcell->setPort(i ? "\\OUTB" : "\\OUTA", tap.second); newcell->setPort(i ? "\\OUTB" : "\\OUTA", tap.second);
newcell->setParam(i ? "\\OUTB_DELAY" : "\\OUTA_DELAY", tap.first + 1); newcell->setParam(i ? "\\OUTB_TAP" : "\\OUTA_TAP", tap.first + 1);
i++; i++;
} }

1
techlibs/greenpak4/Makefile.inc
View file

@ -2,7 +2,6 @@
OBJS += techlibs/greenpak4/synth_greenpak4.o OBJS += techlibs/greenpak4/synth_greenpak4.o
OBJS += techlibs/greenpak4/greenpak4_counters.o OBJS += techlibs/greenpak4/greenpak4_counters.o
$(eval $(call add_share_file,share/greenpak4,techlibs/greenpak4/cells_extract.v))
$(eval $(call add_share_file,share/greenpak4,techlibs/greenpak4/cells_map.v)) $(eval $(call add_share_file,share/greenpak4,techlibs/greenpak4/cells_map.v))
$(eval $(call add_share_file,share/greenpak4,techlibs/greenpak4/cells_sim.v)) $(eval $(call add_share_file,share/greenpak4,techlibs/greenpak4/cells_sim.v))
$(eval $(call add_share_file,share/greenpak4,techlibs/greenpak4/gp_dff.lib)) $(eval $(call add_share_file,share/greenpak4,techlibs/greenpak4/gp_dff.lib))

15
techlibs/greenpak4/cells_extract.v
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@ -1,15 +0,0 @@
//Wrapper module to patch up output of iopadmap
module GP_IOBUF(input IN, output OUT, input OE, inout IO);
GP_IBUF ibuf(
.IN(IO),
.OUT(OUT)
);
$_TBUF_ tbuf(
.A(IN),
.E(OE),
.Y(OUT)
);
endmodule

8
techlibs/greenpak4/cells_sim.v
View file

@ -278,9 +278,9 @@ endmodule
module GP_SHREG(input nRST, input CLK, input IN, output OUTA, output OUTB); module GP_SHREG(input nRST, input CLK, input IN, output OUTA, output OUTB);
parameter OUTA_DELAY = 1; parameter OUTA_TAP = 1;
parameter OUTA_INVERT = 0; parameter OUTA_INVERT = 0;
parameter OUTB_DELAY = 1; parameter OUTB_TAP = 1;
reg[15:0] shreg = 0; reg[15:0] shreg = 0;
@ -294,8 +294,8 @@ module GP_SHREG(input nRST, input CLK, input IN, output OUTA, output OUTB);
end end
assign OUTA = (OUTA_INVERT) ? ~shreg[OUTA_DELAY - 1] : shreg[OUTA_DELAY - 1]; assign OUTA = (OUTA_INVERT) ? ~shreg[OUTA_TAP - 1] : shreg[OUTA_TAP - 1];
assign OUTB = shreg[OUTB_DELAY - 1]; assign OUTB = shreg[OUTB_TAP - 1];
endmodule endmodule

5
techlibs/greenpak4/synth_greenpak4.cc
View file

@ -176,14 +176,13 @@ struct SynthGreenPAK4Pass : public ScriptPass
if (check_label("map_cells")) if (check_label("map_cells"))
{ {
run("shregmap -tech greenpak4"); run("shregmap -tech greenpak4");
run("iopadmap -bits -inpad GP_IBUF OUT:IN -outpad GP_OBUF IN:OUT -inoutpad GP_IBUF OUT:IN");
run("extract -map +/greenpak4/cells_extract.v -verbose");
run("dfflibmap -liberty +/greenpak4/gp_dff.lib"); run("dfflibmap -liberty +/greenpak4/gp_dff.lib");
run("techmap -map +/greenpak4/cells_map.v");
run("dffinit -ff GP_DFF Q INIT"); run("dffinit -ff GP_DFF Q INIT");
run("dffinit -ff GP_DFFR Q INIT"); run("dffinit -ff GP_DFFR Q INIT");
run("dffinit -ff GP_DFFS Q INIT"); run("dffinit -ff GP_DFFS Q INIT");
run("dffinit -ff GP_DFFSR Q INIT"); run("dffinit -ff GP_DFFSR Q INIT");
run("iopadmap -bits -inpad GP_IBUF OUT:IN -outpad GP_OBUF IN:OUT -inoutpad GP_OBUF OUT:IN -toutpad GP_OBUFT OE:IN:OUT -tinoutpad GP_IOBUF OE:OUT:IN:IO");
run("techmap -map +/greenpak4/cells_map.v");
run("clean"); run("clean");
} }