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ecp5: Adding DFF maps

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Signed-off-by: David Shah <davey1576@gmail.com>
This commit is contained in:
David Shah 2018-07-13 14:32:23 +02:00
parent 1def34f2a6
commit eb8f3f7dc4
2 changed files with 30 additions and 1 deletions
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2
techlibs/ecp5/cells_sim.v
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@ -199,7 +199,7 @@ module TRELLIS_FF(input CLK, LSR, CE, DI, output reg Q);
wire srval = (REGSET == "SET") ? 1'b1 : 1'b0;
initial Q = 1'b0;
initial Q = srval;
generate
if (SRMODE == "ASYNC") begin