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	memory_dff: Fix needlessly duplicating enable bits.
When the register being merged into the EN signal happens to be a $sdff, the current code creates a new $mux for every bit, even if they happen to be identical (as is usually the case), preventing proper grouping further down the flow. Fix this by adding a simple cache. Fixes #2409.
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							|  | @ -0,0 +1,24 @@ | |||
| read_verilog <<EOT | ||||
| module t (...); | ||||
| 
 | ||||
| input CLK; | ||||
| input [10:0] A; | ||||
| input WE; | ||||
| input C; | ||||
| input [7:0] DI; | ||||
| output reg [7:0] DO; | ||||
| 
 | ||||
| reg [7:0] mem[2047:0]; | ||||
| 
 | ||||
| always @(posedge CLK) begin | ||||
| 	if (C) | ||||
| 		if (WE) | ||||
| 			mem[A] <= DI; | ||||
| 	DO <= mem[A]; | ||||
| end | ||||
| 
 | ||||
| endmodule | ||||
| EOT | ||||
| 
 | ||||
| synth_ecp5 | ||||
| select -assert-count 1 t:DP16KD | ||||
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