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manual: fix typo.

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whitequark 2020-08-27 16:34:48 +00:00
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manual/CHAPTER_Overview.tex
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@ -92,7 +92,7 @@ in different stages of the synthesis.
\section{The RTL Intermediate Language}
All frontends, passes and backends in Yosys operate on a design in RTLIL} representation.
All frontends, passes and backends in Yosys operate on a design in RTLIL representation.
The only exception are the high-level frontends that use the AST representation as an intermediate step before generating RTLIL
data.