From 1e852cef16f98692a8a284194ffe52bec06c7166 Mon Sep 17 00:00:00 2001
From: Chris Hathhorn <chathhorn@galois.com>
Date: Thu, 12 Feb 2026 21:51:38 -0600
Subject: [PATCH] Fix segfault from shift with 0-width signed arg.

Fixes #5684.
---
 kernel/calc.cc                         |  2 +-
 tests/various/const_shift_empty_arg.ys | 49 ++++++++++++++++++++++++++
 2 files changed, 50 insertions(+), 1 deletion(-)
 create mode 100644 tests/various/const_shift_empty_arg.ys

diff --git a/kernel/calc.cc b/kernel/calc.cc
index 9b0885db9..84ac100ab 100644
--- a/kernel/calc.cc
+++ b/kernel/calc.cc
@@ -291,7 +291,7 @@ static RTLIL::Const const_shift_worker(const RTLIL::Const &arg1, const RTLIL::Co
 		if (pos < 0)
 			result.set(i, vacant_bits);
 		else if (pos >= BigInteger(GetSize(arg1)))
-			result.set(i, sign_ext ? arg1.back() : vacant_bits);
+			result.set(i, sign_ext && !arg1.empty() ? arg1.back() : vacant_bits);
 		else
 			result.set(i, arg1[pos.toInt()]);
 	}
diff --git a/tests/various/const_shift_empty_arg.ys b/tests/various/const_shift_empty_arg.ys
new file mode 100644
index 000000000..4073e198d
--- /dev/null
+++ b/tests/various/const_shift_empty_arg.ys
@@ -0,0 +1,49 @@
+# Regression test for #5684: const_shift_worker must not crash when arg1 is
+# empty.
+
+read_json << EOF
+{
+    "modules": {
+        "sshl": {
+            "cells": {
+                "sshlCell": {
+                    "connections": {
+                        "A": [],
+                        "B": [3],
+                        "Y": [1]
+                    },
+                    "parameters": {
+                        "A_SIGNED": "1",
+                        "A_WIDTH": "0",
+                        "B_SIGNED": "0",
+                        "B_WIDTH": "1",
+                        "Y_WIDTH": "1"
+                    },
+                    "port_directions": {
+                        "A": "input",
+                        "B": "input",
+                        "Y": "output"
+                    },
+                    "type": "$sshl"
+                }
+            },
+            "ports": {
+                "A": {
+                    "bits": [],
+                    "direction": "input"
+                },
+                "B": {
+                    "bits": [3],
+                    "direction": "input"
+                },
+                "Y": {
+                    "bits": [1],
+                    "direction": "output"
+                }
+            }
+        }
+    }
+}
+EOF
+
+eval -set B 0 -show Y sshl