3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-10-09 09:21:58 +00:00

xilinx_dffopt: Don't crash on missing IS_*_INVERTED.

The presence of IS_*_INVERTED on FD* cells follows Vivado, which
apparently has been decided by a dice roll.  Just assume false if the
parameter doesn't exist.

Fixes #2559.
This commit is contained in:
Marcelina Kościelnicka 2021-01-25 13:01:18 +01:00
parent cd6f0732f3
commit ea79e16bab
3 changed files with 51 additions and 4 deletions

View file

@ -40,10 +40,11 @@ proc
equiv_opt -assert -map +/xilinx/cells_sim.v synth_xilinx -noiopad # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd mux16 # Constrain all select calls below inside the top module
select -assert-max 2 t:LUT3
select -assert-max 2 t:LUT4
select -assert-min 4 t:LUT6
select -assert-max 7 t:LUT6
select -assert-max 2 t:MUXF7
dump
select -assert-none t:LUT6 t:LUT4 t:MUXF7 %% t:* %D
select -assert-none t:LUT6 t:LUT4 t:LUT3 t:MUXF7 %% t:* %D