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Merge
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commit
ea76abdaee
10 changed files with 167 additions and 21 deletions
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@ -40,7 +40,7 @@ struct PeepoptPass : public Pass {
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log("\n");
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log("This pass applies a collection of peephole optimizers to the current design.\n");
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log("\n");
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log("This pass employs the following rules:\n");
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log("This pass employs the following rules by default:\n");
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log("\n");
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log(" * muxadd - Replace S?(A+B):A with A+(S?B:0)\n");
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log("\n");
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@ -61,14 +61,26 @@ struct PeepoptPass : public Pass {
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log(" limits the amount of padding to a multiple of the data, \n");
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log(" to avoid high resource usage from large temporary MUX trees.\n");
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log("\n");
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log("If -formalclk is specified it instead employs the following rules:\n");
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log("\n");
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log(" * clockgateff - Replace latch based clock gating patterns with a flip-flop\n");
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log(" based pattern to prevent combinational paths from the\n");
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log(" output to the enable input after running clk2fflogic.\n");
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log("\n");
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}
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void execute(std::vector<std::string> args, RTLIL::Design *design) override
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{
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log_header(design, "Executing PEEPOPT pass (run peephole optimizers).\n");
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bool formalclk = false;
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size_t argidx;
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for (argidx = 1; argidx < args.size(); argidx++)
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{
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if (args[argidx] == "-formalclk") {
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formalclk = true;
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continue;
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}
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break;
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}
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extra_args(args, argidx, design);
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@ -90,12 +102,16 @@ struct PeepoptPass : public Pass {
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pm.setup(module->selected_cells());
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pm.run_shiftadd();
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pm.run_shiftmul_right();
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pm.run_shiftmul_left();
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pm.run_muldiv();
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pm.run_muldiv_c();
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pm.run_muxadd();
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if (formalclk) {
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pm.run_formal_clockgateff();
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} else {
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pm.run_shiftadd();
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pm.run_shiftmul_right();
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pm.run_shiftmul_left();
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pm.run_muldiv();
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pm.run_muldiv_c();
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pm.run_muxadd();
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}
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}
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}
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}
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