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Fixed some missing "verilog_" in documentation

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Rodrigo Alejandro Melo 2019-12-13 10:17:05 -03:00
parent 9ab1feeaf1
commit e9dc2759c4
3 changed files with 4 additions and 4 deletions
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2
frontends/verilog/preproc.cc
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@ -28,7 +28,7 @@
*
* Ad-hoc implementation of a Verilog preprocessor. The directives `define,
* `include, `ifdef, `ifndef, `else and `endif are handled here. All other
* directives are handled by the lexer (see lexer.l).
* directives are handled by the lexer (see verilog_lexer.l).
*
*/