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Selective boolopt

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This commit is contained in:
Alain Dargelas 2024-11-25 15:22:16 -08:00
parent b2587f5e68
commit e9b7db0a4a
1 changed files with 3 additions and 1 deletions
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4
passes/techmap/techmap.cc
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@ -164,7 +164,7 @@ struct TechmapWorker
module->rename(cell, stringf("$techmap%d", autoidx++) + cell->name.str()); module->rename(cell, stringf("$techmap%d", autoidx++) + cell->name.str());
break; break;
} }
// SILIMATE: Improve the naming
for (auto tpl_cell : tpl->cells()) for (auto tpl_cell : tpl->cells())
for (auto attr : cell->attributes) { for (auto attr : cell->attributes) {
tpl_cell->attributes[attr.first] = attr.second; tpl_cell->attributes[attr.first] = attr.second;
@ -393,6 +393,7 @@ struct TechmapWorker
c->attributes[attr.first] = attr.second; c->attributes[attr.first] = attr.second;
c->attributes.erase(ID::reprocess_after); c->attributes.erase(ID::reprocess_after);
} }
// SILIMATE: Improve the naming
for (auto attr : tpl_cell->attributes) { for (auto attr : tpl_cell->attributes) {
c->attributes[attr.first] = attr.second; c->attributes[attr.first] = attr.second;
} }
@ -535,6 +536,7 @@ struct TechmapWorker
{ {
extmapper_module = extmapper_design->addModule(m_name); extmapper_module = extmapper_design->addModule(m_name);
RTLIL::Cell *extmapper_cell = extmapper_module->addCell(cell->type, cell); RTLIL::Cell *extmapper_cell = extmapper_module->addCell(cell->type, cell);
// SILIMATE: Improve the naming
for (auto attr : cell->attributes) { for (auto attr : cell->attributes) {
extmapper_cell->attributes[attr.first] = attr.second; extmapper_cell->attributes[attr.first] = attr.second;
} }