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Add pattern detection support for DSP48E1 model, check against vendor

This commit is contained in:
Eddie Hung 2019-09-18 10:45:04 -07:00
parent 1f18736d20
commit e992dbf2c5
3 changed files with 102 additions and 8 deletions

View file

@ -81,6 +81,26 @@ module testbench;
errcount = errcount + 1;
ERROR_FLAG = 1;
end
if (REF_PATTERNDETECT !== PATTERNDETECT) begin
$display("ERROR at %1t: REF_PATTERNDETECT=%b UUT_PATTERNDETECT=%b DIFF=%b REF_P=%b P=%b", $time, REF_PATTERNDETECT, PATTERNDETECT, REF_PATTERNDETECT ^ PATTERNDETECT, REF_P, P);
errcount = errcount + 1;
ERROR_FLAG = 1;
end
if (REF_PATTERNBDETECT !== PATTERNBDETECT) begin
$display("ERROR at %1t: REF_PATTERNBDETECT=%b UUT_PATTERNBDETECT=%b DIFF=%b", $time, REF_PATTERNBDETECT, PATTERNBDETECT, REF_PATTERNBDETECT ^ PATTERNBDETECT);
errcount = errcount + 1;
ERROR_FLAG = 1;
end
if (REF_OVERFLOW !== OVERFLOW) begin
$display("ERROR at %1t: REF_OVERFLOW=%b UUT_OVERFLOW=%b DIFF=%b", $time, REF_OVERFLOW, OVERFLOW, REF_OVERFLOW ^ OVERFLOW);
errcount = errcount + 1;
ERROR_FLAG = 1;
end
if (REF_UNDERFLOW !== UNDERFLOW) begin
$display("ERROR at %1t: REF_UNDERFLOW=%b UUT_UNDERFLOW=%b DIFF=%b", $time, REF_UNDERFLOW, UNDERFLOW, REF_UNDERFLOW ^ UNDERFLOW);
errcount = errcount + 1;
ERROR_FLAG = 1;
end
#3;
end
endtask
@ -594,4 +614,39 @@ module simd24_preadd_noreg_nocasc;
.IS_INMODE_INVERTED (5'b0),
.IS_OPMODE_INVERTED (7'b0)
) testbench ();
endmodule
endmodule
module macc_overflow_underflow;
testbench #(
.ACASCREG (0),
.ADREG (0),
.ALUMODEREG (0),
.AREG (0),
.AUTORESET_PATDET ("NO_RESET"),
.A_INPUT ("DIRECT"),
.BCASCREG (0),
.BREG (0),
.B_INPUT ("DIRECT"),
.CARRYINREG (0),
.CARRYINSELREG (0),
.CREG (0),
.DREG (0),
.INMODEREG (0),
.MREG (0),
.OPMODEREG (0),
.PREG (1),
.SEL_MASK ("MASK"),
.SEL_PATTERN ("PATTERN"),
.USE_DPORT ("FALSE"),
.USE_MULT ("DYNAMIC"),
.USE_PATTERN_DETECT ("PATDET"),
.USE_SIMD ("ONE48"),
.MASK (48'h1FFFFFFFFFFF),
.PATTERN (48'h000000000000),
.IS_ALUMODE_INVERTED(4'b0),
.IS_CARRYIN_INVERTED(1'b0),
.IS_CLK_INVERTED (1'b0),
.IS_INMODE_INVERTED (5'b0),
.IS_OPMODE_INVERTED (7'b0)
) testbench ();
endmodule