rtlil: Adjust internal check for $mem_v2 cells

There's a mismatch between what `kernel/mem.cc` emits for memories
with no read ports and what the internal RTLIL check expects.

The point of dispute it whether some of the parameters relating to read
ports have a zero-width value in this case. The `mem.cc` code says no,
the internal checker says yes.

Surveying the other `$mem_v2` parameters, and internal cell parameters
in general, I am inclined to side with the `mem.cc` code.

This breaks RTLIL compatibility but for an obscure edge case.

tests/memories/nordports.ys

@@ -0,0 +1,9 @@
+# check memory_collect doesn't produce invalid RTLIL on a memory w/o read ports
+read_rtlil <<EOF
+autoidx 1
+attribute \top 1
+module \top
+  memory width 4 size 3 \foo
+end
+EOF
+memory_collect