mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-06 06:03:23 +00:00
Code Activity

Rename T_{RISE,FALL}_AVG to T_{RISE,FALL}_TYP to better match verilog std nomenclature

Browse source 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
Clifford Wolf 2019-04-22 09:52:47 +02:00
parent 846eb5ea98
commit e807e88b60
4 changed files with 70 additions and 70 deletions
Download patch file Download diff file Expand all files Collapse all files

4
kernel/rtlil.cc
View file

@ -1199,10 +1199,10 @@ namespace {
param_bool("\\SRC_DST_PEN");
param_bool("\\SRC_DST_POL");
param("\\T_RISE_MIN");
param("\\T_RISE_AVG");
param("\\T_RISE_TYP");
param("\\T_RISE_MAX");
param("\\T_FALL_MIN");
param("\\T_FALL_AVG");
param("\\T_FALL_TYP");
param("\\T_FALL_MAX");
port("\\EN", 1);
port("\\SRC", param("\\SRC_WIDTH"));