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	Add "verific -vlog-incdir" and "verific -vlog-define"
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					 1 changed files with 35 additions and 0 deletions
				
			
		|  | @ -1851,6 +1851,16 @@ struct VerificPass : public Pass { | |||
| 		log("Load the specified VHDL files into Verific.\n"); | ||||
| 		log("\n"); | ||||
| 		log("\n"); | ||||
| 		log("    verific -vlog-incdir <directory>..\n"); | ||||
| 		log("\n"); | ||||
| 		log("Add Verilog include directories.\n"); | ||||
| 		log("\n"); | ||||
| 		log("\n"); | ||||
| 		log("    verific -vlog-define <macro>[=<value>]..\n"); | ||||
| 		log("\n"); | ||||
| 		log("Add Verilog defines. (The macros SYNTHESIS and VERIFIC are defined implicitly.)\n"); | ||||
| 		log("\n"); | ||||
| 		log("\n"); | ||||
| 		log("    verific -import [options] <top-module>..\n"); | ||||
| 		log("\n"); | ||||
| 		log("Elaborate the design for the specified top modules, import to Yosys and\n"); | ||||
|  | @ -1909,6 +1919,8 @@ struct VerificPass : public Pass { | |||
| 		Message::RegisterCallBackMsg(msg_func); | ||||
| 		RuntimeFlags::SetVar("db_allow_external_nets", 1); | ||||
| 		RuntimeFlags::SetVar("vhdl_ignore_assertion_statements", 0); | ||||
| 		veri_file::DefineCmdLineMacro("VERIFIC"); | ||||
| 		veri_file::DefineCmdLineMacro("SYNTHESIS"); | ||||
| 
 | ||||
| 		const char *release_str = Message::ReleaseString(); | ||||
| 		time_t release_time = Message::ReleaseDate(); | ||||
|  | @ -1924,6 +1936,27 @@ struct VerificPass : public Pass { | |||
| 
 | ||||
| 		int argidx = 1; | ||||
| 
 | ||||
| 		if (GetSize(args) > argidx && args[argidx] == "-vlog-incdir") { | ||||
| 			for (argidx++; argidx < GetSize(args); argidx++) | ||||
| 				veri_file::AddIncludeDir(args[argidx].c_str()); | ||||
| 			goto check_error; | ||||
| 		} | ||||
| 
 | ||||
| 		if (GetSize(args) > argidx && args[argidx] == "-vlog-define") { | ||||
| 			for (argidx++; argidx < GetSize(args); argidx++) { | ||||
| 				string name = args[argidx]; | ||||
| 				size_t equal = name.find('='); | ||||
| 				if (equal != std::string::npos) { | ||||
| 					string value = name.substr(equal+1); | ||||
| 					name = name.substr(0, equal); | ||||
| 					veri_file::DefineCmdLineMacro(name.c_str(), value.c_str()); | ||||
| 				} else { | ||||
| 					veri_file::DefineCmdLineMacro(name.c_str()); | ||||
| 				} | ||||
| 			} | ||||
| 			goto check_error; | ||||
| 		} | ||||
| 
 | ||||
| 		if (GetSize(args) > argidx && args[argidx] == "-vlog95") { | ||||
| 			for (argidx++; argidx < GetSize(args); argidx++) | ||||
| 				if (!veri_file::Analyze(args[argidx].c_str(), veri_file::VERILOG_95)) | ||||
|  | @ -2139,6 +2172,8 @@ struct VerificPass : public Pass { | |||
| 				nl_done.insert(nl); | ||||
| 			} | ||||
| 
 | ||||
| 			veri_file::Reset(); | ||||
| 			vhdl_file::Reset(); | ||||
| 			Libset::Reset(); | ||||
| 			goto check_error; | ||||
| 		} | ||||
|  |  | |||
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