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Added new RTLIL::Cell port access methods
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2 changed files with 71 additions and 0 deletions
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@ -484,7 +484,15 @@ public:
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std::map<RTLIL::IdString, RTLIL::SigSpec> connections_;
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std::map<RTLIL::IdString, RTLIL::Const> parameters;
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RTLIL_ATTRIBUTE_MEMBERS
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// access cell ports
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void unset(RTLIL::IdString portname);
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void set(RTLIL::IdString portname, RTLIL::SigSpec signal);
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RTLIL::SigSpec get(RTLIL::IdString portname) const;
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const std::map<RTLIL::IdString, RTLIL::SigSpec> &connections();
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void check();
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void fixup_parameters(bool set_a_signed = false, bool set_b_signed = false);
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template<typename T> void rewrite_sigspecs(T functor);
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};
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