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Update tests

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This commit is contained in:
Miodrag Milanovic 2023-06-09 14:41:45 +02:00
parent 0d4a670267
commit e6f7cf3b29
7 changed files with 19 additions and 17 deletions
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9
tests/arch/xilinx/mux_lut4.ys
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@ -30,12 +30,13 @@ proc
equiv_opt -assert -map +/xilinx/cells_sim.v synth_xilinx -family xc3se -noiopad # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd mux8 # Constrain all select calls below inside the top module
select -assert-count 4 t:LUT1
select -assert-count 3 t:LUT4
select -assert-count 2 t:MUXF5
select -assert-max 5 t:LUT1
select -assert-max 3 t:LUT3
select -assert-max 3 t:LUT4
select -assert-max 3 t:MUXF5
select -assert-count 1 t:MUXF6
select -assert-none t:LUT1 t:LUT4 t:MUXF5 t:MUXF6 %% t:* %D
select -assert-none t:LUT1 t:LUT3 t:LUT4 t:MUXF5 t:MUXF6 %% t:* %D
design -load read