mirror of
https://github.com/YosysHQ/yosys
synced 2025-08-08 20:21:25 +00:00
Merge remote-tracking branch 'origin/master' into eddie/cleanup
This commit is contained in:
Eddie Hung
commit
e6d5147214
19 changed files with 880 additions and 384 deletions
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@ -17,11 +17,10 @@
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*
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*/
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#include "kernel/register.h"
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#include "kernel/yosys.h"
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#include "kernel/celltypes.h"
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#include "passes/techmap/libparse.h"
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#include "kernel/log.h"
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#include "kernel/cost.h"
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USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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@ -228,25 +227,16 @@ struct statdata_t
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{
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int tran_cnt = 0;
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bool tran_cnt_exact = true;
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auto &gate_costs = CellCosts::cmos_gate_cost();
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for (auto it : num_cells_by_type) {
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auto ctype = it.first;
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auto cnum = it.second;
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if (ctype == "$_NOT_")
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tran_cnt += 2*cnum;
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else if (ctype.in("$_NAND_", "$_NOR_"))
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tran_cnt += 4*cnum;
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else if (ctype.in("$_AOI3_", "$_OAI3_"))
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tran_cnt += 6*cnum;
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else if (ctype.in("$_AOI4_", "$_OAI4_"))
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tran_cnt += 8*cnum;
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else if (ctype.in("$_NMUX_"))
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tran_cnt += 10*cnum;
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else if (ctype.in("$_MUX_", "$_XOR_", "$_XNOR_"))
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tran_cnt += 12*cnum;
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if (gate_costs.count(ctype))
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tran_cnt += cnum * gate_costs.at(ctype);
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else if (ctype.in("$_DFF_P_", "$_DFF_N_"))
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tran_cnt += 16*cnum;
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tran_cnt += cnum * 16;
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else
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tran_cnt_exact = false;
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}
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@ -640,6 +640,31 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool cons
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did_something = true;
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}
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}
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if (cell->type.in("$add", "$sub")) {
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RTLIL::SigSpec sig_a = assign_map(cell->getPort("\\A"));
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RTLIL::SigSpec sig_b = assign_map(cell->getPort("\\B"));
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RTLIL::SigSpec sig_y = cell->getPort("\\Y");
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bool sub = cell->type == "$sub";
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int i;
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for (i = 0; i < GetSize(sig_y); i++) {
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if (sig_b.at(i, State::Sx) == State::S0 && sig_a.at(i, State::Sx) != State::Sx)
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module->connect(sig_y[i], sig_a[i]);
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else if (!sub && sig_a.at(i, State::Sx) == State::S0 && sig_b.at(i, State::Sx) != State::Sx)
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module->connect(sig_y[i], sig_b[i]);
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else
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break;
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}
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if (i > 0) {
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cover_list("opt.opt_expr.fine", "$add", "$sub", cell->type.str());
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cell->setPort("\\A", sig_a.extract_end(i));
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cell->setPort("\\B", sig_b.extract_end(i));
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cell->setPort("\\Y", sig_y.extract_end(i));
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cell->fixup_parameters();
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did_something = true;
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}
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}
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}
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if (cell->type.in("$reduce_xor", "$reduce_xnor", "$shift", "$shiftx", "$shl", "$shr", "$sshl", "$sshr",
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@ -342,9 +342,9 @@ struct WreduceWorker
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}
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}
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if (cell->type.in("$pos", "$add", "$mul", "$and", "$or", "$xor"))
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if (cell->type.in("$pos", "$add", "$mul", "$and", "$or", "$xor", "$sub"))
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{
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bool is_signed = cell->getParam("\\A_SIGNED").as_bool();
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bool is_signed = cell->getParam("\\A_SIGNED").as_bool() || cell->type == "$sub";
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int a_size = 0, b_size = 0;
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if (cell->hasPort("\\A")) a_size = GetSize(cell->getPort("\\A"));
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@ -352,7 +352,7 @@ struct WreduceWorker
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int max_y_size = max(a_size, b_size);
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if (cell->type == "$add")
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if (cell->type.in("$add", "$sub"))
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max_y_size++;
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if (cell->type == "$mul")
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@ -931,9 +931,7 @@ void abc_module(RTLIL::Design *design, RTLIL::Module *current_module, std::strin
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{
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log_header(design, "Executing ABC.\n");
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auto cell_cost = [](IdString cell_type) {
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return get_cell_cost(cell_type, dict<RTLIL::IdString, RTLIL::Const>(), nullptr, nullptr, cmos_cost);
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};
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auto &cell_cost = cmos_cost ? CellCosts::cmos_gate_cost() : CellCosts::default_gate_cost();
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buffer = stringf("%s/stdcells.genlib", tempdir_name.c_str());
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f = fopen(buffer.c_str(), "wt");
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@ -941,42 +939,42 @@ void abc_module(RTLIL::Design *design, RTLIL::Module *current_module, std::strin
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log_error("Opening %s for writing failed: %s\n", buffer.c_str(), strerror(errno));
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fprintf(f, "GATE ZERO 1 Y=CONST0;\n");
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fprintf(f, "GATE ONE 1 Y=CONST1;\n");
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fprintf(f, "GATE BUF %d Y=A; PIN * NONINV 1 999 1 0 1 0\n", cell_cost("$_BUF_"));
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fprintf(f, "GATE NOT %d Y=!A; PIN * INV 1 999 1 0 1 0\n", cell_cost("$_NOT_"));
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fprintf(f, "GATE BUF %d Y=A; PIN * NONINV 1 999 1 0 1 0\n", cell_cost.at("$_BUF_"));
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fprintf(f, "GATE NOT %d Y=!A; PIN * INV 1 999 1 0 1 0\n", cell_cost.at("$_NOT_"));
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if (enabled_gates.empty() || enabled_gates.count("AND"))
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fprintf(f, "GATE AND %d Y=A*B; PIN * NONINV 1 999 1 0 1 0\n", cell_cost("$_AND_"));
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fprintf(f, "GATE AND %d Y=A*B; PIN * NONINV 1 999 1 0 1 0\n", cell_cost.at("$_AND_"));
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if (enabled_gates.empty() || enabled_gates.count("NAND"))
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fprintf(f, "GATE NAND %d Y=!(A*B); PIN * INV 1 999 1 0 1 0\n", cell_cost("$_NAND_"));
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fprintf(f, "GATE NAND %d Y=!(A*B); PIN * INV 1 999 1 0 1 0\n", cell_cost.at("$_NAND_"));
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if (enabled_gates.empty() || enabled_gates.count("OR"))
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fprintf(f, "GATE OR %d Y=A+B; PIN * NONINV 1 999 1 0 1 0\n", cell_cost("$_OR_"));
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fprintf(f, "GATE OR %d Y=A+B; PIN * NONINV 1 999 1 0 1 0\n", cell_cost.at("$_OR_"));
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if (enabled_gates.empty() || enabled_gates.count("NOR"))
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fprintf(f, "GATE NOR %d Y=!(A+B); PIN * INV 1 999 1 0 1 0\n", cell_cost("$_NOR_"));
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fprintf(f, "GATE NOR %d Y=!(A+B); PIN * INV 1 999 1 0 1 0\n", cell_cost.at("$_NOR_"));
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if (enabled_gates.empty() || enabled_gates.count("XOR"))
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fprintf(f, "GATE XOR %d Y=(A*!B)+(!A*B); PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost("$_XOR_"));
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fprintf(f, "GATE XOR %d Y=(A*!B)+(!A*B); PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at("$_XOR_"));
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if (enabled_gates.empty() || enabled_gates.count("XNOR"))
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fprintf(f, "GATE XNOR %d Y=(A*B)+(!A*!B); PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost("$_XNOR_"));
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fprintf(f, "GATE XNOR %d Y=(A*B)+(!A*!B); PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at("$_XNOR_"));
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if (enabled_gates.empty() || enabled_gates.count("ANDNOT"))
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fprintf(f, "GATE ANDNOT %d Y=A*!B; PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost("$_ANDNOT_"));
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fprintf(f, "GATE ANDNOT %d Y=A*!B; PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at("$_ANDNOT_"));
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if (enabled_gates.empty() || enabled_gates.count("ORNOT"))
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fprintf(f, "GATE ORNOT %d Y=A+!B; PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost("$_ORNOT_"));
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fprintf(f, "GATE ORNOT %d Y=A+!B; PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at("$_ORNOT_"));
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if (enabled_gates.empty() || enabled_gates.count("AOI3"))
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fprintf(f, "GATE AOI3 %d Y=!((A*B)+C); PIN * INV 1 999 1 0 1 0\n", cell_cost("$_AOI3_"));
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fprintf(f, "GATE AOI3 %d Y=!((A*B)+C); PIN * INV 1 999 1 0 1 0\n", cell_cost.at("$_AOI3_"));
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if (enabled_gates.empty() || enabled_gates.count("OAI3"))
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fprintf(f, "GATE OAI3 %d Y=!((A+B)*C); PIN * INV 1 999 1 0 1 0\n", cell_cost("$_OAI3_"));
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fprintf(f, "GATE OAI3 %d Y=!((A+B)*C); PIN * INV 1 999 1 0 1 0\n", cell_cost.at("$_OAI3_"));
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if (enabled_gates.empty() || enabled_gates.count("AOI4"))
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fprintf(f, "GATE AOI4 %d Y=!((A*B)+(C*D)); PIN * INV 1 999 1 0 1 0\n", cell_cost("$_AOI4_"));
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fprintf(f, "GATE AOI4 %d Y=!((A*B)+(C*D)); PIN * INV 1 999 1 0 1 0\n", cell_cost.at("$_AOI4_"));
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if (enabled_gates.empty() || enabled_gates.count("OAI4"))
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fprintf(f, "GATE OAI4 %d Y=!((A+B)*(C+D)); PIN * INV 1 999 1 0 1 0\n", cell_cost("$_OAI4_"));
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fprintf(f, "GATE OAI4 %d Y=!((A+B)*(C+D)); PIN * INV 1 999 1 0 1 0\n", cell_cost.at("$_OAI4_"));
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if (enabled_gates.empty() || enabled_gates.count("MUX"))
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fprintf(f, "GATE MUX %d Y=(A*B)+(S*B)+(!S*A); PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost("$_MUX_"));
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fprintf(f, "GATE MUX %d Y=(A*B)+(S*B)+(!S*A); PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at("$_MUX_"));
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if (enabled_gates.empty() || enabled_gates.count("NMUX"))
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fprintf(f, "GATE NMUX %d Y=!((A*B)+(S*B)+(!S*A)); PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost("$_NMUX_"));
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fprintf(f, "GATE NMUX %d Y=!((A*B)+(S*B)+(!S*A)); PIN * UNKNOWN 1 999 1 0 1 0\n", cell_cost.at("$_NMUX_"));
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if (map_mux4)
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fprintf(f, "GATE MUX4 %d Y=(!S*!T*A)+(S*!T*B)+(!S*T*C)+(S*T*D); PIN * UNKNOWN 1 999 1 0 1 0\n", 2*cell_cost("$_MUX_"));
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fprintf(f, "GATE MUX4 %d Y=(!S*!T*A)+(S*!T*B)+(!S*T*C)+(S*T*D); PIN * UNKNOWN 1 999 1 0 1 0\n", 2*cell_cost.at("$_MUX_"));
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if (map_mux8)
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fprintf(f, "GATE MUX8 %d Y=(!S*!T*!U*A)+(S*!T*!U*B)+(!S*T*!U*C)+(S*T*!U*D)+(!S*!T*U*E)+(S*!T*U*F)+(!S*T*U*G)+(S*T*U*H); PIN * UNKNOWN 1 999 1 0 1 0\n", 4*cell_cost("$_MUX_"));
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fprintf(f, "GATE MUX8 %d Y=(!S*!T*!U*A)+(S*!T*!U*B)+(!S*T*!U*C)+(S*T*!U*D)+(!S*!T*U*E)+(S*!T*U*F)+(!S*T*U*G)+(S*T*U*H); PIN * UNKNOWN 1 999 1 0 1 0\n", 4*cell_cost.at("$_MUX_"));
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if (map_mux16)
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fprintf(f, "GATE MUX16 %d Y=(!S*!T*!U*!V*A)+(S*!T*!U*!V*B)+(!S*T*!U*!V*C)+(S*T*!U*!V*D)+(!S*!T*U*!V*E)+(S*!T*U*!V*F)+(!S*T*U*!V*G)+(S*T*U*!V*H)+(!S*!T*!U*V*I)+(S*!T*!U*V*J)+(!S*T*!U*V*K)+(S*T*!U*V*L)+(!S*!T*U*V*M)+(S*!T*U*V*N)+(!S*T*U*V*O)+(S*T*U*V*P); PIN * UNKNOWN 1 999 1 0 1 0\n", 8*cell_cost("$_MUX_"));
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fprintf(f, "GATE MUX16 %d Y=(!S*!T*!U*!V*A)+(S*!T*!U*!V*B)+(!S*T*!U*!V*C)+(S*T*!U*!V*D)+(!S*!T*U*!V*E)+(S*!T*U*!V*F)+(!S*T*U*!V*G)+(S*T*U*!V*H)+(!S*!T*!U*V*I)+(S*!T*!U*V*J)+(!S*T*!U*V*K)+(S*T*!U*V*L)+(!S*!T*U*V*M)+(S*!T*U*V*N)+(!S*T*U*V*O)+(S*T*U*V*P); PIN * UNKNOWN 1 999 1 0 1 0\n", 8*cell_cost.at("$_MUX_"));
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fclose(f);
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if (!lut_costs.empty()) {
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