CMake: Add most of passes

CMakeLists.txt

@@ -25,6 +25,7 @@ add_compile_definitions(_YOSYS_)
 
 add_subdirectory(kernel)
 add_subdirectory(libs)
+
 add_subdirectory(frontends/aiger)
 add_subdirectory(frontends/aiger2)
 add_subdirectory(frontends/ast)
@@ -34,6 +35,7 @@ add_subdirectory(frontends/liberty)
 add_subdirectory(frontends/rpc)
 add_subdirectory(frontends/rtlil)
 add_subdirectory(frontends/verilog)
+
 add_subdirectory(backends/aiger)
 add_subdirectory(backends/aiger2)
 add_subdirectory(backends/blif)
@@ -52,9 +54,11 @@ add_subdirectory(backends/smv)
 add_subdirectory(backends/spice)
 add_subdirectory(backends/table)
 add_subdirectory(backends/verilog)
+
 add_subdirectory(passes/cmds)
 add_subdirectory(passes/equiv)
 add_subdirectory(passes/fsm)
+add_subdirectory(passes/hierarchy)
 add_subdirectory(passes/memory)
 add_subdirectory(passes/opt)
 #add_subdirectory(passes/pmgen)
@@ -62,6 +66,27 @@ add_subdirectory(passes/proc)
 add_subdirectory(passes/sat)
 add_subdirectory(passes/techmap)
 add_subdirectory(passes/tests)
+
+add_subdirectory(techlibs/achronix)
+add_subdirectory(techlibs/anlogic)
 add_subdirectory(techlibs/common)
+add_subdirectory(techlibs/coolrunner2)
+add_subdirectory(techlibs/easic)
+add_subdirectory(techlibs/ecp5)
+add_subdirectory(techlibs/efinix)
+add_subdirectory(techlibs/fabulous)
+add_subdirectory(techlibs/gatemate)
+add_subdirectory(techlibs/gowin)
+add_subdirectory(techlibs/greenpak4)
+add_subdirectory(techlibs/ice40)
+add_subdirectory(techlibs/intel)
+add_subdirectory(techlibs/intel_alm)
+add_subdirectory(techlibs/lattice)
+add_subdirectory(techlibs/microchip)
+add_subdirectory(techlibs/nanoxplore)
+add_subdirectory(techlibs/nexus)
+add_subdirectory(techlibs/quicklogic)
+add_subdirectory(techlibs/sf2)
+add_subdirectory(techlibs/xilinx)
 
 target_link_libraries(yosys PRIVATE z)

passes/cmds/CMakeLists.txt

@@ -1,56 +1,56 @@
 add_library(yosys_passes_cmds INTERFACE)
 
 target_sources(yosys_passes_cmds INTERFACE
+    exec.cc
     add.cc
-    autoname.cc
-    blackbox.cc
-    box_derive.cc
-    bugpoint.cc
-    check.cc
-    chformal.cc
-    chtype.cc
-    clean_zerowidth.cc
-    connect.cc
-    connwrappers.cc
-    copy.cc
-    cover.cc
     delete.cc
     design.cc
-    dft_tag.cc
-    edgetypes.cc
-    example_dt.cc
-    exec.cc
-    future.cc
-    glift.cc
-    internal_stats.cc
-    logcmd.cc
-    logger.cc
-    ltp.cc
-    plugin.cc
-    portarcs.cc
-    portlist.cc
-    printattrs.cc
-    rename.cc
-    scatter.cc
-    scc.cc
-    scratchpad.cc
     select.cc
-    setattr.cc
-    setenv.cc
-    setundef.cc
     show.cc
-    splice.cc
-    splitcells.cc
-    splitnets.cc
-    sta.cc
-    stat.cc
-    tee.cc
-    torder.cc
-    trace.cc
     viz.cc
-    wrapcell.cc
+    rename.cc
+    autoname.cc
+    connect.cc
+    scatter.cc
+    setundef.cc
+    splitnets.cc
+    splitcells.cc
+    stat.cc
+    internal_stats.cc
+    setattr.cc
+    copy.cc
+    splice.cc
+    scc.cc
+    glift.cc
+    torder.cc
+    logcmd.cc
+    tee.cc
     write_file.cc
+    connwrappers.cc
+    cover.cc
+    trace.cc
+    plugin.cc
+    check.cc
+    edgetypes.cc
+    portlist.cc
+    chformal.cc
+    chtype.cc
+    blackbox.cc
+    ltp.cc
+    bugpoint.cc
+    scratchpad.cc
+    logger.cc
+    printattrs.cc
+    sta.cc
+    clean_zerowidth.cc
     xprop.cc
+    dft_tag.cc
+    future.cc
+    box_derive.cc
+    example_dt.cc
+    portarcs.cc
+    wrapcell.cc
+    setenv.cc
 )
 
 target_link_libraries(yosys PRIVATE yosys_passes_cmds)

passes/hierarchy/CMakeLists.txt

@@ -0,0 +1,10 @@
+add_library(yosys_passes_hierarchy INTERFACE)
+
+target_sources(yosys_passes_hierarchy INTERFACE
+    hierarchy.cc
+    uniquify.cc
+    submod.cc
+    keep_hierarchy.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_passes_hierarchy)

techlibs/achronix/CMakeLists.txt

@@ -0,0 +1,7 @@
+add_library(yosys_techlibs_achronix INTERFACE)
+
+target_sources(yosys_techlibs_achronix INTERFACE
+    synth_achronix.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_achronix)

techlibs/anlogic/CMakeLists.txt

@@ -0,0 +1,9 @@
+add_library(yosys_techlibs_anlogic INTERFACE)
+
+target_sources(yosys_techlibs_anlogic INTERFACE
+    synth_anlogic.cc
+    anlogic_eqn.cc
+    anlogic_fixcarry.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_anlogic)

techlibs/coolrunner2/CMakeLists.txt

@@ -0,0 +1,9 @@
+add_library(yosys_techlibs_coolrunner2 INTERFACE)
+
+target_sources(yosys_techlibs_coolrunner2 INTERFACE
+    synth_coolrunner2.cc
+    coolrunner2_sop.cc
+    coolrunner2_fixup.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_coolrunner2)

techlibs/easic/CMakeLists.txt

@@ -0,0 +1,7 @@
+add_library(yosys_techlibs_easic INTERFACE)
+
+target_sources(yosys_techlibs_easic INTERFACE
+    synth_easic.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_easic)

techlibs/ecp5/CMakeLists.txt

@@ -0,0 +1,7 @@
+add_library(yosys_techlibs_ecp5 INTERFACE)
+
+target_sources(yosys_techlibs_ecp5 INTERFACE
+    synth_ecp5.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_ecp5)

techlibs/efinix/CMakeLists.txt

@@ -0,0 +1,8 @@
+add_library(yosys_techlibs_efinix INTERFACE)
+
+target_sources(yosys_techlibs_efinix INTERFACE
+    synth_efinix.cc
+    efinix_fixcarry.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_efinix)

techlibs/fabulous/CMakeLists.txt

@@ -0,0 +1,7 @@
+add_library(yosys_techlibs_fabulous INTERFACE)
+
+target_sources(yosys_techlibs_fabulous INTERFACE
+    synth_fabulous.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_fabulous)

techlibs/gatemate/CMakeLists.txt

@@ -0,0 +1,8 @@
+add_library(yosys_techlibs_gatemate INTERFACE)
+
+target_sources(yosys_techlibs_gatemate INTERFACE
+    synth_gatemate.cc
+    gatemate_foldinv.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_gatemate)

techlibs/gowin/CMakeLists.txt

@@ -0,0 +1,7 @@
+add_library(yosys_techlibs_gowin INTERFACE)
+
+target_sources(yosys_techlibs_gowin INTERFACE
+    synth_gowin.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_gowin)

techlibs/greenpak4/CMakeLists.txt

@@ -0,0 +1,8 @@
+add_library(yosys_techlibs_greenpak4 INTERFACE)
+
+target_sources(yosys_techlibs_greenpak4 INTERFACE
+    synth_greenpak4.cc
+    greenpak4_dffinv.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_greenpak4)

techlibs/ice40/CMakeLists.txt

@@ -0,0 +1,9 @@
+add_library(yosys_techlibs_ice40 INTERFACE)
+
+target_sources(yosys_techlibs_ice40 INTERFACE
+    synth_ice40.cc
+    ice40_braminit.cc
+    ice40_opt.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_ice40)

techlibs/intel/CMakeLists.txt

@@ -0,0 +1,7 @@
+add_library(yosys_techlibs_intel INTERFACE)
+
+target_sources(yosys_techlibs_intel INTERFACE
+    synth_intel.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_intel)

techlibs/intel_alm/CMakeLists.txt

@@ -0,0 +1,7 @@
+add_library(yosys_techlibs_intel_alm INTERFACE)
+
+target_sources(yosys_techlibs_intel_alm INTERFACE
+    synth_intel_alm.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_intel_alm)

techlibs/lattice/CMakeLists.txt

@@ -0,0 +1,8 @@
+add_library(yosys_techlibs_lattice INTERFACE)
+
+target_sources(yosys_techlibs_lattice INTERFACE
+    synth_lattice.cc
+    lattice_gsr.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_lattice)

techlibs/microchip/CMakeLists.txt

@@ -0,0 +1,8 @@
+add_library(yosys_techlibs_microchip INTERFACE)
+
+target_sources(yosys_techlibs_microchip INTERFACE
+    synth_microchip.cc
+    microchip_dffopt.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_microchip)

techlibs/nanoxplore/CMakeLists.txt

@@ -0,0 +1,8 @@
+add_library(yosys_techlibs_nanoxplore INTERFACE)
+
+target_sources(yosys_techlibs_nanoxplore INTERFACE
+    synth_nanoxplore.cc
+    nx_carry.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_nanoxplore)

techlibs/nexus/CMakeLists.txt

@@ -0,0 +1,7 @@
+add_library(yosys_techlibs_nexus INTERFACE)
+
+target_sources(yosys_techlibs_nexus INTERFACE
+    synth_nexus.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_nexus)

techlibs/quicklogic/CMakeLists.txt

@@ -0,0 +1,12 @@
+add_library(yosys_techlibs_quicklogic INTERFACE)
+
+target_sources(yosys_techlibs_quicklogic INTERFACE
+    synth_quicklogic.cc
+    ql_bram_merge.cc
+    ql_bram_types.cc
+    ql_dsp_simd.cc
+    ql_dsp_io_regs.cc
+    #ql_dsp_macc.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_quicklogic)

techlibs/sf2/CMakeLists.txt

@@ -0,0 +1,7 @@
+add_library(yosys_techlibs_sf2 INTERFACE)
+
+target_sources(yosys_techlibs_sf2 INTERFACE
+    synth_sf2.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_sf2)

techlibs/xilinx/CMakeLists.txt

@@ -0,0 +1,8 @@
+add_library(yosys_techlibs_xilinx INTERFACE)
+
+target_sources(yosys_techlibs_xilinx INTERFACE
+    synth_xilinx.cc
+    xilinx_dffopt.cc
+)
+
+target_link_libraries(yosys PRIVATE yosys_techlibs_xilinx)