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Merge remote-tracking branch 'upstream/main' into silimate

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Mohamed Gaber 2026-06-09 16:22:51 +03:00
commit e58125b605
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834 changed files with 25281 additions and 8780 deletions
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25
docs/source/code_examples/extensions/Makefile
View file

@ -1,33 +1,28 @@
PROGRAM_PREFIX :=
YOSYS ?= ../../../../$(PROGRAM_PREFIX)yosys
include ../../../common.mk
.PHONY: all dots examples
all: dots examples
dots: test1.dot my_cmd.so
examples: test0.log test1.log test2.log my_cmd.so
CXXFLAGS=$(shell $(YOSYS)-config --cxxflags)
DATDIR=$(shell $(YOSYS)-config --datdir)
my_cmd.so: my_cmd.cc
$(YOSYS)-config --exec --cxx $(subst $(DATDIR),../../../../share,$(CXXFLAGS)) --ldflags -o my_cmd.so -shared my_cmd.cc --ldlibs
@$(YOSYS_CONFIG) --exec --cxx --cxxflags --ldflags -o my_cmd.so -shared my_cmd.cc --ldlibs
test0.log: my_cmd.so
$(YOSYS) -QTl test0.log_new -m ./my_cmd.so -p 'my_cmd foo bar' -f verilog absval_ref.v
mv test0.log_new test0.log
@$(YOSYS) -QTl test0.log_new -m ./my_cmd.so -p 'my_cmd foo bar' -f verilog absval_ref.v >/dev/null 2>&1
@mv test0.log_new test0.log
test1.log: my_cmd.so
$(YOSYS) -QTl test1.log_new -m ./my_cmd.so -p 'clean; test1; dump' -f verilog absval_ref.v
mv test1.log_new test1.log
@$(YOSYS) -QTl test1.log_new -m ./my_cmd.so -p 'clean; test1; dump' -f verilog absval_ref.v >/dev/null 2>&1
@mv test1.log_new test1.log
test1.dot: my_cmd.so
$(YOSYS) -m ./my_cmd.so -p 'test1; show -format dot -prefix test1'
@$(YOSYS) -m ./my_cmd.so -p 'test1; show -format dot -prefix test1' >/dev/null 2>&1
test2.log: my_cmd.so
$(YOSYS) -QTl test2.log_new -m ./my_cmd.so -p 'hierarchy -top test; test2' -f verilog sigmap_test.v
mv test2.log_new test2.log
@$(YOSYS) -QTl test2.log_new -m ./my_cmd.so -p 'hierarchy -top test; test2' -f verilog sigmap_test.v >/dev/null 2>&1
@mv test2.log_new test2.log
.PHONY: clean
clean:
rm -f *.d *.so *.dot
@rm -f *.d *.so *.dot

4
docs/source/code_examples/extensions/my_cmd.cc
View file

@ -14,7 +14,7 @@ struct MyPass : public Pass {
log("Modules in current design:\n");
for (auto mod : design->modules())
log(" %s (%d wires, %d cells)\n", log_id(mod),
log(" %s (%d wires, %d cells)\n", mod,
GetSize(mod->wires()), GetSize(mod->cells()));
}
} MyPass;
@ -28,7 +28,7 @@ struct Test1Pass : public Pass {
log_error("A module with the name absval already exists!\n");
RTLIL::Module *module = design->addModule("\\absval");
log("Name of this module: %s\n", log_id(module));
log("Name of this module: %s\n", module);
RTLIL::Wire *a = module->addWire("\\a", 4);
a->port_input = true;

12
docs/source/code_examples/fifo/Makefile
View file

@ -1,6 +1,4 @@
PROGRAM_PREFIX :=
YOSYS ?= ../../../../$(PROGRAM_PREFIX)yosys
include ../../../common.mk
DOT_NAMES = addr_gen_hier addr_gen_proc addr_gen_clean
DOT_NAMES += rdata_proc rdata_flat rdata_adffe rdata_memrdv2 rdata_alumacc rdata_coarse
@ -16,12 +14,12 @@ dots: $(DOTS) $(MAPDOTS)
examples: fifo.out fifo.stat
$(DOTS) fifo.out: fifo.v fifo.ys
$(YOSYS) fifo.ys -l fifo.out -Q -T
@$(YOSYS) fifo.ys -l fifo.out -Q -T >/dev/null 2>&1
$(MAPDOTS) fifo.stat: fifo.v fifo_map.ys
$(YOSYS) fifo_map.ys
@$(YOSYS) fifo_map.ys >/dev/null 2>&1
.PHONY: clean
clean:
rm -f *.dot
rm -f fifo.out fifo.stat
@rm -f *.dot
@rm -f fifo.out fifo.stat

14
docs/source/code_examples/functional/dummy.cc
View file

@ -24,19 +24,19 @@ struct FunctionalDummyBackend : public Backend {
// write node functions
for (auto node : ir)
*f << " assign " << id2cstr(node.name())
*f << " assign " << node.name().unescape()
<< " = " << node.to_string() << "\n";
*f << "\n";
// write outputs and next state
for (auto output : ir.outputs())
*f << " " << id2cstr(output->kind)
<< " " << id2cstr(output->name)
<< " = " << id2cstr(output->value().name()) << "\n";
*f << " " << output->kind.unescape()
<< " " << output->name.unescape()
<< " = " << output->value().name().unescape() << "\n";
for (auto state : ir.states())
*f << " " << id2cstr(state->kind)
<< " " << id2cstr(state->name)
<< " = " << id2cstr(state->next_value().name()) << "\n";
*f << " " << state->kind.unescape()
<< " " << state->name.unescape()
<< " = " << state->next_value().name().unescape() << "\n";
}
}
} FunctionalDummyBackend;

8
docs/source/code_examples/intro/Makefile
View file

@ -1,6 +1,4 @@
PROGRAM_PREFIX :=
YOSYS ?= ../../../../$(PROGRAM_PREFIX)yosys
include ../../../common.mk
DOTS = counter_00.dot counter_01.dot counter_02.dot counter_03.dot
@ -10,8 +8,8 @@ dots: $(DOTS)
examples:
$(DOTS): counter.v counter.ys mycells.lib
$(YOSYS) counter.ys
@$(YOSYS) counter.ys >/dev/null 2>&1
.PHONY: clean
clean:
rm -f *.dot
@rm -f *.dot

10
docs/source/code_examples/macc/Makefile
View file

@ -1,6 +1,4 @@
PROGRAM_PREFIX :=
YOSYS ?= ../../../../$(PROGRAM_PREFIX)yosys
include ../../../common.mk
DOTS = macc_simple_xmap.dot macc_xilinx_xmap.dot
@ -10,12 +8,12 @@ dots: $(DOTS)
examples:
macc_simple_xmap.dot: macc_simple_*.v macc_simple_test.ys
$(YOSYS) macc_simple_test.ys
@$(YOSYS) macc_simple_test.ys >/dev/null 2>&1
macc_xilinx_xmap.dot: macc_xilinx_*.v macc_xilinx_test.ys
$(YOSYS) macc_xilinx_test.ys
@$(YOSYS) macc_xilinx_test.ys >/dev/null 2>&1
.PHONY: clean
clean:
rm -f *.dot
@rm -f *.dot

1
docs/source/code_examples/macro_commands/synth_ice40.ys
View file

@ -6,6 +6,7 @@ begin:
proc
flatten:
check
flatten
tribuf -logic
deminout

10
docs/source/code_examples/opt/Makefile
View file

@ -1,6 +1,4 @@
PROGRAM_PREFIX :=
YOSYS ?= ../../../../$(PROGRAM_PREFIX)yosys
include ../../../common.mk
DOT_NAMES = opt_share opt_muxtree opt_merge opt_expr
@ -12,9 +10,9 @@ dots: $(DOTS)
examples:
%.dot: %.ys
$(YOSYS) $<
gvpack -u -o $@ $*_full.dot
@$(YOSYS) $< >/dev/null 2>&1
@gvpack -u -o $@ $*_full.dot >/dev/null 2>&1
.PHONY: clean
clean:
rm -f *.dot
@rm -f *.dot

8
docs/source/code_examples/scrambler/Makefile
View file

@ -1,6 +1,4 @@
PROGRAM_PREFIX :=
YOSYS ?= ../../../../$(PROGRAM_PREFIX)yosys
include ../../../common.mk
.PHONY: all dots examples
all: dots examples
@ -8,8 +6,8 @@ dots: scrambler_p01.dot scrambler_p02.dot
examples:
scrambler_p01.dot scrambler_p02.dot: scrambler.ys scrambler.v
$(YOSYS) scrambler.ys
@$(YOSYS) scrambler.ys >/dev/null 2>&1
.PHONY: clean
clean:
rm -f *.dot
@rm -f *.dot

16
docs/source/code_examples/selections/Makefile
View file

@ -1,6 +1,4 @@
PROGRAM_PREFIX :=
YOSYS ?= ../../../../$(PROGRAM_PREFIX)yosys
include ../../../common.mk
SUMPROD = sumprod_00 sumprod_01 sumprod_02 sumprod_03 sumprod_04 sumprod_05
SUMPROD_DOTS := $(addsuffix .dot,$(SUMPROD))
@ -17,18 +15,18 @@ dots: select.dot $(SUMPROD_DOTS) $(MEMDEMO_DOTS) $(SUBMOD_DOTS)
examples: sumprod.out
select.dot: select.v select.ys
$(YOSYS) select.ys
@$(YOSYS) select.ys >/dev/null 2>&1
$(SUMPROD_DOTS) sumprod.out: sumprod.v sumprod.ys
$(YOSYS) sumprod.ys
@$(YOSYS) sumprod.ys >/dev/null 2>&1
$(MEMDEMO_DOTS): memdemo.v memdemo.ys
$(YOSYS) memdemo.ys
@$(YOSYS) memdemo.ys >/dev/null 2>&1
$(SUBMOD_DOTS): memdemo.v submod.ys
$(YOSYS) submod.ys
@$(YOSYS) submod.ys >/dev/null 2>&1
.PHONY: clean
clean:
rm -rf *.dot
rm -f sumprod.out
@rm -rf *.dot
@rm -f sumprod.out

16
docs/source/code_examples/show/Makefile
View file

@ -1,6 +1,4 @@
PROGRAM_PREFIX :=
YOSYS ?= ../../../../$(PROGRAM_PREFIX)yosys
include ../../../common.mk
EXAMPLE = example_first example_second example_third
EXAMPLE_DOTS := $(addsuffix .dot,$(EXAMPLE))
@ -14,18 +12,18 @@ dots: splice.dot $(EXAMPLE_DOTS) $(CMOS_DOTS)
examples: example.out
splice.dot: splice.v
$(YOSYS) -p 'prep -top splice_demo; show -format dot -prefix splice' splice.v
@$(YOSYS) -p 'prep -top splice_demo; show -format dot -prefix splice' splice.v >/dev/null 2>&1
$(EXAMPLE_DOTS): example.v example.ys
$(YOSYS) example.ys
@$(YOSYS) example.ys >/dev/null 2>&1
example.out: example_lscd.ys example.v
$(YOSYS) $< -l $@ -Q -T
@$(YOSYS) $< -l $@ -Q -T >/dev/null 2>&1
$(CMOS_DOTS): cmos.v cmos.ys
$(YOSYS) cmos.ys
@$(YOSYS) cmos.ys >/dev/null 2>&1
.PHONY: clean
clean:
rm -rf *.dot
rm -f example.out
@rm -rf *.dot
@rm -f example.out

17
docs/source/code_examples/stubnets/Makefile
View file

@ -1,19 +1,20 @@
include ../../../common.mk
.PHONY: all dots examples
all: dots examples
dots:
examples:
examples: test
.PHONY: test
test: stubnets.so
yosys -ql test1.log -m ./stubnets.so test.v -p "stubnets"
yosys -ql test2.log -m ./stubnets.so test.v -p "opt; stubnets"
yosys -ql test3.log -m ./stubnets.so test.v -p "techmap; opt; stubnets -report_bits"
tail test1.log test2.log test3.log
@$(YOSYS) -ql test1.log -m ./stubnets.so test.v -p "stubnets" >/dev/null 2>&1
@$(YOSYS) -ql test2.log -m ./stubnets.so test.v -p "opt; stubnets" >/dev/null 2>&1
@$(YOSYS) -ql test3.log -m ./stubnets.so test.v -p "techmap; opt; stubnets -report_bits" >/dev/null 2>&1
stubnets.so: stubnets.cc
yosys-config --exec --cxx --cxxflags --ldflags -o $@ -shared $^ --ldlibs
@$(YOSYS_CONFIG) --exec --cxx --cxxflags --ldflags -o $@ -shared $^ --ldlibs >/dev/null 2>&1
.PHONY: clean
clean:
rm -f test1.log test2.log test3.log
rm -f stubnets.so stubnets.d
@rm -f test1.log test2.log test3.log
@rm -f stubnets.so stubnets.d

6
docs/source/code_examples/stubnets/stubnets.cc
View file

@ -27,7 +27,7 @@ static void find_stub_nets(RTLIL::Design *design, RTLIL::Module *module, bool re
// count output lines for this module (needed only for summary output at the end)
int line_count = 0;
log("Looking for stub wires in module %s:\n", RTLIL::id2cstr(module->name));
log("Looking for stub wires in module %s:\n", module);
// For all ports on all cells
for (auto &cell_iter : module->cells_)
@ -74,11 +74,11 @@ static void find_stub_nets(RTLIL::Design *design, RTLIL::Module *module, bool re
// report stub bits and/or stub wires, don't report single bits
// if called with report_bits set to false.
if (GetSize(stub_bits) == GetSize(sig)) {
log(" found stub wire: %s\n", RTLIL::id2cstr(wire->name));
log(" found stub wire: %s\n", wire);
} else {
if (!report_bits)
continue;
log(" found wire with stub bits: %s [", RTLIL::id2cstr(wire->name));
log(" found wire with stub bits: %s [", wire);
for (int bit : stub_bits)
log("%s%d", bit == *stub_bits.begin() ? "" : ", ", bit);
log("]\n");

9
docs/source/code_examples/synth_flow/Makefile
View file

@ -1,12 +1,9 @@
include ../../../common.mk
DOT_TARGETS += proc_01 proc_02 proc_03
DOT_TARGETS += memory_01 memory_02
DOT_TARGETS += techmap_01
PROGRAM_PREFIX :=
YOSYS ?= ../../../../$(PROGRAM_PREFIX)yosys
DOTS = $(addsuffix .dot,$(DOT_TARGETS))
.PHONY: all dots examples
@ -15,9 +12,9 @@ dots: $(DOTS)
examples:
%.dot: %.v %.ys
$(YOSYS) -p 'script $*.ys; show -notitle -prefix $* -format dot'
@$(YOSYS) -p 'script $*.ys; show -notitle -prefix $* -format dot' >/dev/null 2>&1
.PHONY: clean
clean:
rm -f *.dot
@rm -f *.dot

16
docs/source/code_examples/techmap/Makefile
View file

@ -1,6 +1,4 @@
PROGRAM_PREFIX :=
YOSYS ?= ../../../../$(PROGRAM_PREFIX)yosys
include ../../../common.mk
.PHONY: all dots examples
all: dots examples
@ -8,20 +6,20 @@ dots: red_or3x1.dot sym_mul.dot mymul.dot mulshift.dot addshift.dot
examples:
red_or3x1.dot: red_or3x1_*
$(YOSYS) red_or3x1_test.ys
@$(YOSYS) red_or3x1_test.ys >/dev/null 2>&1
sym_mul.dot: sym_mul_*
$(YOSYS) sym_mul_test.ys
@$(YOSYS) sym_mul_test.ys >/dev/null 2>&1
mymul.dot: mymul_*
$(YOSYS) mymul_test.ys
@$(YOSYS) mymul_test.ys >/dev/null 2>&1
mulshift.dot: mulshift_*
$(YOSYS) mulshift_test.ys
@$(YOSYS) mulshift_test.ys >/dev/null 2>&1
addshift.dot: addshift_*
$(YOSYS) addshift_test.ys
@$(YOSYS) addshift_test.ys >/dev/null 2>&1
.PHONY: clean
clean:
rm -f *.dot
@rm -f *.dot