mirror of
				https://github.com/YosysHQ/yosys
				synced 2025-11-04 05:19:11 +00:00 
			
		
		
		
	Adjust makefiles to work with out-of-tree builds
This is based on work done by Larry Doolittle
This commit is contained in:
		
							parent
							
								
									c43f38c81b
								
							
						
					
					
						commit
						e4ef000b70
					
				
					 12 changed files with 32 additions and 41 deletions
				
			
		| 
						 | 
				
			
			@ -3,16 +3,9 @@ ifneq ($(SMALL),1)
 | 
			
		|||
OBJS += techlibs/common/synth.o
 | 
			
		||||
endif
 | 
			
		||||
 | 
			
		||||
EXTRA_TARGETS += techlibs/common/blackbox.v
 | 
			
		||||
 | 
			
		||||
techlibs/common/blackbox.v: techlibs/common/blackbox.sed techlibs/common/simlib.v techlibs/common/simcells.v
 | 
			
		||||
	$(P) cat techlibs/common/simlib.v techlibs/common/simcells.v | $(SED) -rf techlibs/common/blackbox.sed > techlibs/common/blackbox.v.new
 | 
			
		||||
	$(Q) mv techlibs/common/blackbox.v.new techlibs/common/blackbox.v
 | 
			
		||||
 | 
			
		||||
$(eval $(call add_share_file,share,techlibs/common/simlib.v))
 | 
			
		||||
$(eval $(call add_share_file,share,techlibs/common/simcells.v))
 | 
			
		||||
$(eval $(call add_share_file,share,techlibs/common/techmap.v))
 | 
			
		||||
$(eval $(call add_share_file,share,techlibs/common/blackbox.v))
 | 
			
		||||
$(eval $(call add_share_file,share,techlibs/common/pmux2mux.v))
 | 
			
		||||
$(eval $(call add_share_file,share,techlibs/common/adff2dff.v))
 | 
			
		||||
$(eval $(call add_share_file,share,techlibs/common/cells.lib))
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -1,5 +0,0 @@
 | 
			
		|||
#!/bin/sed -r
 | 
			
		||||
/^(wire|assign|reg|event|integer|localparam|\/\/|[\/ ]\*| *$|`)/ d;
 | 
			
		||||
/^(genvar|generate|always|initial|task|function)/,/^end/ d;
 | 
			
		||||
/^endmodule/ s/$/\n/;
 | 
			
		||||
s/ reg / /;
 | 
			
		||||
| 
						 | 
				
			
			@ -11,7 +11,7 @@ EXTRA_OBJS += techlibs/ice40/brams_init.mk
 | 
			
		|||
.SECONDARY: techlibs/ice40/brams_init.mk
 | 
			
		||||
 | 
			
		||||
techlibs/ice40/brams_init.mk: techlibs/ice40/brams_init.py
 | 
			
		||||
	$(P) cd techlibs/ice40 && python brams_init.py
 | 
			
		||||
	$(P) cd share/ice40 && python $<
 | 
			
		||||
	$(Q) touch techlibs/ice40/brams_init.mk
 | 
			
		||||
 | 
			
		||||
techlibs/ice40/brams_init1.vh: techlibs/ice40/brams_init.mk
 | 
			
		||||
| 
						 | 
				
			
			@ -23,7 +23,4 @@ $(eval $(call add_share_file,share/ice40,techlibs/ice40/cells_map.v))
 | 
			
		|||
$(eval $(call add_share_file,share/ice40,techlibs/ice40/cells_sim.v))
 | 
			
		||||
$(eval $(call add_share_file,share/ice40,techlibs/ice40/brams.txt))
 | 
			
		||||
$(eval $(call add_share_file,share/ice40,techlibs/ice40/brams_map.v))
 | 
			
		||||
$(eval $(call add_share_file,share/ice40,techlibs/ice40/brams_init1.vh))
 | 
			
		||||
$(eval $(call add_share_file,share/ice40,techlibs/ice40/brams_init2.vh))
 | 
			
		||||
$(eval $(call add_share_file,share/ice40,techlibs/ice40/brams_init3.vh))
 | 
			
		||||
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -10,8 +10,8 @@ EXTRA_OBJS += techlibs/xilinx/brams_init.mk
 | 
			
		|||
.SECONDARY: techlibs/xilinx/brams_init.mk
 | 
			
		||||
 | 
			
		||||
techlibs/xilinx/brams_init.mk: techlibs/xilinx/brams_init.py
 | 
			
		||||
	$(P) cd techlibs/xilinx && python brams_init.py
 | 
			
		||||
	$(Q) touch techlibs/xilinx/brams_init.mk
 | 
			
		||||
	$(P) cd share/xilinx && python $<
 | 
			
		||||
	$(Q) touch $@
 | 
			
		||||
 | 
			
		||||
techlibs/xilinx/brams_init_36.vh: techlibs/xilinx/brams_init.mk
 | 
			
		||||
techlibs/xilinx/brams_init_32.vh: techlibs/xilinx/brams_init.mk
 | 
			
		||||
| 
						 | 
				
			
			@ -22,10 +22,6 @@ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/cells_map.v))
 | 
			
		|||
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/cells_sim.v))
 | 
			
		||||
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams.txt))
 | 
			
		||||
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_map.v))
 | 
			
		||||
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_init_36.vh))
 | 
			
		||||
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_init_32.vh))
 | 
			
		||||
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_init_18.vh))
 | 
			
		||||
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_init_16.vh))
 | 
			
		||||
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_bb.v))
 | 
			
		||||
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/drams.txt))
 | 
			
		||||
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/drams_map.v))
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
		Loading…
	
	Add table
		Add a link
		
	
		Reference in a new issue