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Merge pull request #145 from laanwj/master
Add instructions for building manual on Ubuntu
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2 changed files with 32 additions and 3 deletions
29
README
29
README
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@ -383,3 +383,32 @@ from SystemVerilog:
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- The keywords "always_comb", "always_ff" and "always_latch", "logic" and
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- The keywords "always_comb", "always_ff" and "always_latch", "logic" and
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"bit" are supported.
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"bit" are supported.
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Building the documentation
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==========================
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On Ubuntu, texlive needs these packages to be able to build the manual:
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sudo apt-get install texlive-binaries
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sudo apt-get install texlive-science # install algorithm2e.sty
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sudo apt-get install texlive-bibtex-extra # gets multibib.sty
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sudo apt-get install texlive-fonts-extra # gets skull.sty and dsfont.sty
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sudo apt-get install texlive-publishers # IEEEtran.cls
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Also the non-free font luximono should be installed, there is unfortulately
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no Ubuntu package for this so it should be installed separately using
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`getnonfreefonts`:
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wget https://tug.org/fonts/getnonfreefonts/install-getnonfreefonts
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sudo texlua install-getnonfreefonts # will install to /usr/local by default, can be changed by editing BINDIR at MANDIR at the top of the script
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getnonfreefonts luximono # installs to /home/user/texmf
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Then execute, from the root of the repository:
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make manual
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Notes:
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- To run `make manual` you need to have installed yosys with `make install`,
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otherwise it will fail on finding `kernel/yosys.h` while building
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`PRESENTATION_Prog`.
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@ -151,14 +151,14 @@ availability of a Free and Open Source (FOSS) synthesis tool that can be used
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as basis for custom tools would be helpful.
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as basis for custom tools would be helpful.
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In the absence of such a tool, the Yosys Open SYnthesis Suite (Yosys) was
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In the absence of such a tool, the Yosys Open SYnthesis Suite (Yosys) was
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developped. This document covers the design and implementation of this tool.
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developed. This document covers the design and implementation of this tool.
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At the moment the main focus of Yosys lies on the high-level aspects of
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At the moment the main focus of Yosys lies on the high-level aspects of
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digital synthesis. The pre-existing FOSS logic-synthesis tool ABC is used
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digital synthesis. The pre-existing FOSS logic-synthesis tool ABC is used
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by Yosys to perform advanced gate-level optimizations.
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by Yosys to perform advanced gate-level optimizations.
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An evaluation of Yosys based on real-world designs is included. It is shown
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An evaluation of Yosys based on real-world designs is included. It is shown
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that Yosys can be used as-is to synthesize such designs. The results produced
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that Yosys can be used as-is to synthesize such designs. The results produced
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by Yosys in this tests where successflly verified using formal verification
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by Yosys in this tests where successfully verified using formal verification
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and are comparable in quality to the results produced by a commercial
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and are comparable in quality to the results produced by a commercial
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synthesis tool.
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synthesis tool.
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@ -172,7 +172,7 @@ University of Technology \cite{BACC}.
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AIG & And-Inverter-Graph \\
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AIG & And-Inverter-Graph \\
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ASIC & Application-Specific Integrated Circuit \\
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ASIC & Application-Specific Integrated Circuit \\
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AST & Abstract Syntax Tree \\
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AST & Abstract Syntax Tree \\
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BDD & Binary Decicion Diagram \\
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BDD & Binary Decision Diagram \\
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BLIF & Berkeley Logic Interchange Format \\
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BLIF & Berkeley Logic Interchange Format \\
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EDA & Electronic Design Automation \\
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EDA & Electronic Design Automation \\
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EDIF & Electronic Design Interchange Format \\
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EDIF & Electronic Design Interchange Format \\
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