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https://github.com/YosysHQ/yosys
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Fixed not intentional log_signal removal
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parent
965a3e67f0
commit
e4a3b44e8e
2 changed files with 2 additions and 2 deletions
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@ -1048,7 +1048,7 @@ struct XAigerWriter : AigerWriter {
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} else if (!is_input && !inputs) {
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for (auto &bit : conn.second) {
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if (!bit.wire || (bit.wire->port_input && !bit.wire->port_output))
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log_error("Bad connection %s/%s ~ %s\n", box, conn.first.unescape(), conn.second);
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log_error("Bad connection %s/%s ~ %s\n", box, conn.first.unescape(), log_signal(conn.second));
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ensure_pi(bit, cursor);
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@ -502,7 +502,7 @@ struct BufnormPass : public Pass {
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if (conn.second != newsig) {
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log(" fixing input signal on cell %s port %s: %s\n",
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cell, conn.first.unescape(), newsig);
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cell, conn.first.unescape(), log_signal(newsig));
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cell->setPort(conn.first, newsig);
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count_updated_cellports++;
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}
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