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Refactored uses of log_id()

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Codexplorer 2026-05-08 00:01:43 -07:00
parent 89d83a3410
commit e41b969da2
186 changed files with 1219 additions and 1220 deletions
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4
techlibs/microchip/microchip_dffopt.cc
View file

@ -121,7 +121,7 @@ struct MicrochipDffOptPass : public Pass {
extra_args(args, argidx, design);
for (auto module : design->selected_modules()) {
log("Optimizing FFs in %s.\n", log_id(module));
log("Optimizing FFs in %s.\n", module);
SigMap sigmap(module);
dict<SigBit, pair<LutData, Cell *>> bit_to_lut;
@ -294,7 +294,7 @@ struct MicrochipDffOptPass : public Pass {
ports += " + S";
if (worthy_post_ce)
ports += " + CE";
log(" Merging D%s LUTs for %s/%s (%d -> %d)\n", ports, log_id(cell), log_id(sig_Q.wire),
log(" Merging D%s LUTs for %s/%s (%d -> %d)\n", ports, cell, sig_Q.wire,
GetSize(lut_d.second), GetSize(final_lut.second));
// Okay, we're doing it. Unmap ports.

18
techlibs/microchip/microchip_dsp.cc
View file

@ -31,13 +31,13 @@ void microchip_dsp_pack(microchip_dsp_pm &pm)
{
auto &st = pm.st_microchip_dsp_pack;
log("Analysing %s.%s for Microchip MACC_PA packing.\n", log_id(pm.module), log_id(st.dsp));
log("Analysing %s.%s for Microchip MACC_PA packing.\n", pm.module, st.dsp);
Cell *cell = st.dsp;
// pack pre-adder
if (st.preAdderStatic) {
SigSpec &pasub = cell->connections_.at(ID(PASUB));
log(" static PASUB preadder %s (%s)\n", log_id(st.preAdderStatic), log_id(st.preAdderStatic->type));
log(" static PASUB preadder %s (%s)\n", st.preAdderStatic, st.preAdderStatic->type.unescape());
bool D_SIGNED = st.preAdderStatic->getParam(ID::B_SIGNED).as_bool();
bool B_SIGNED = st.preAdderStatic->getParam(ID::A_SIGNED).as_bool();
st.sigB.extend_u0(18, B_SIGNED);
@ -60,7 +60,7 @@ void microchip_dsp_pack(microchip_dsp_pm &pm)
}
// pack post-adder
if (st.postAdderStatic) {
log(" postadder %s (%s)\n", log_id(st.postAdderStatic), log_id(st.postAdderStatic->type));
log(" postadder %s (%s)\n", st.postAdderStatic, st.postAdderStatic->type.unescape());
SigSpec &sub = cell->connections_.at(ID(SUB));
// Post-adder in MACC_PA also supports subtraction
// Determines the sign of the output from the multiplier.
@ -171,13 +171,13 @@ void microchip_dsp_pack(microchip_dsp_pm &pm)
log(" clock: %s (%s)\n", log_signal(st.clock), "posedge");
if (st.ffA)
log(" \t ffA:%s\n", log_id(st.ffA));
log(" \t ffA:%s\n", st.ffA);
if (st.ffB)
log(" \t ffB:%s\n", log_id(st.ffB));
log(" \t ffB:%s\n", st.ffB);
if (st.ffD)
log(" \t ffD:%s\n", log_id(st.ffD));
log(" \t ffD:%s\n", st.ffD);
if (st.ffP)
log(" \t ffP:%s\n", log_id(st.ffP));
log(" \t ffP:%s\n", st.ffP);
}
log("\n");
@ -194,7 +194,7 @@ void microchip_dsp_packC(microchip_dsp_CREG_pm &pm)
{
auto &st = pm.st_microchip_dsp_packC;
log_debug("Analysing %s.%s for Microchip DSP packing (REG_C).\n", log_id(pm.module), log_id(st.dsp));
log_debug("Analysing %s.%s for Microchip DSP packing (REG_C).\n", pm.module, st.dsp);
log_debug("ffC: %s\n", log_id(st.ffC, "--"));
Cell *cell = st.dsp;
@ -264,7 +264,7 @@ void microchip_dsp_packC(microchip_dsp_CREG_pm &pm)
log(" clock: %s (%s)", log_signal(st.clock), "posedge");
if (st.ffC)
log(" ffC:%s", log_id(st.ffC));
log(" ffC:%s", st.ffC);
log("\n");
}