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https://github.com/YosysHQ/yosys
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Refactored uses of log_id()
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parent
89d83a3410
commit
e41b969da2
186 changed files with 1219 additions and 1220 deletions
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@ -105,21 +105,21 @@ struct TimingInfo
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auto dst = cell->getPort(ID::DST);
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for (const auto &c : src.chunks())
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if (!c.wire || !c.wire->port_input)
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log_error("Module '%s' contains specify cell '%s' where SRC '%s' is not a module input.\n", log_id(module), log_id(cell), log_signal(src));
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log_error("Module '%s' contains specify cell '%s' where SRC '%s' is not a module input.\n", module, cell, log_signal(src));
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for (const auto &c : dst.chunks())
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if (!c.wire || !c.wire->port_output)
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log_error("Module '%s' contains specify cell '%s' where DST '%s' is not a module output.\n", log_id(module), log_id(cell), log_signal(dst));
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log_error("Module '%s' contains specify cell '%s' where DST '%s' is not a module output.\n", module, cell, log_signal(dst));
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int rise_max = cell->getParam(ID::T_RISE_MAX).as_int();
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int fall_max = cell->getParam(ID::T_FALL_MAX).as_int();
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int max = std::max(rise_max,fall_max);
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if (max < 0)
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log_error("Module '%s' contains specify cell '%s' with T_{RISE,FALL}_MAX < 0.\n", log_id(module), log_id(cell));
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log_error("Module '%s' contains specify cell '%s' with T_{RISE,FALL}_MAX < 0.\n", module, cell);
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if (cell->getParam(ID::FULL).as_bool()) {
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for (const auto &s : src)
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for (const auto &d : dst) {
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auto r = t.comb.insert(BitBit(s,d));
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if (!r.second)
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log_error("Module '%s' contains multiple specify cells for SRC '%s' and DST '%s'.\n", log_id(module), log_signal(s), log_signal(d));
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log_error("Module '%s' contains multiple specify cells for SRC '%s' and DST '%s'.\n", module, log_signal(s), log_signal(d));
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r.first->second = max;
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}
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}
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@ -130,7 +130,7 @@ struct TimingInfo
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const auto &d = dst[i];
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auto r = t.comb.insert(BitBit(s,d));
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if (!r.second)
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log_error("Module '%s' contains multiple specify cells for SRC '%s' and DST '%s'.\n", log_id(module), log_signal(s), log_signal(d));
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log_error("Module '%s' contains multiple specify cells for SRC '%s' and DST '%s'.\n", module, log_signal(s), log_signal(d));
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r.first->second = max;
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}
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}
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@ -139,15 +139,15 @@ struct TimingInfo
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auto src = cell->getPort(ID::SRC).as_bit();
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auto dst = cell->getPort(ID::DST);
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if (!src.wire || !src.wire->port_input)
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log_error("Module '%s' contains specify cell '%s' where SRC '%s' is not a module input.\n", log_id(module), log_id(cell), log_signal(src));
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log_error("Module '%s' contains specify cell '%s' where SRC '%s' is not a module input.\n", module, cell, log_signal(src));
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for (const auto &c : dst.chunks())
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if (!c.wire->port_output)
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log_error("Module '%s' contains specify cell '%s' where DST '%s' is not a module output.\n", log_id(module), log_id(cell), log_signal(dst));
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log_error("Module '%s' contains specify cell '%s' where DST '%s' is not a module output.\n", module, cell, log_signal(dst));
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int rise_max = cell->getParam(ID::T_RISE_MAX).as_int();
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int fall_max = cell->getParam(ID::T_FALL_MAX).as_int();
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int max = std::max(rise_max,fall_max);
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if (max < 0) {
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log_warning("Module '%s' contains specify cell '%s' with T_{RISE,FALL}_MAX < 0 which is currently unsupported. Clamping to 0.\n", log_id(module), log_id(cell));
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log_warning("Module '%s' contains specify cell '%s' with T_{RISE,FALL}_MAX < 0 which is currently unsupported. Clamping to 0.\n", module, cell);
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max = 0;
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}
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for (const auto &d : dst) {
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@ -167,12 +167,12 @@ struct TimingInfo
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auto dst = cell->getPort(ID::DST).as_bit();
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for (const auto &c : src.chunks())
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if (!c.wire || !c.wire->port_input)
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log_error("Module '%s' contains specify cell '%s' where SRC '%s' is not a module input.\n", log_id(module), log_id(cell), log_signal(src));
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log_error("Module '%s' contains specify cell '%s' where SRC '%s' is not a module input.\n", module, cell, log_signal(src));
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if (!dst.wire || !dst.wire->port_input)
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log_error("Module '%s' contains specify cell '%s' where DST '%s' is not a module input.\n", log_id(module), log_id(cell), log_signal(dst));
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log_error("Module '%s' contains specify cell '%s' where DST '%s' is not a module input.\n", module, cell, log_signal(dst));
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int max = cell->getParam(ID::T_LIMIT_MAX).as_int();
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if (max < 0) {
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log_warning("Module '%s' contains specify cell '%s' with T_LIMIT_MAX < 0 which is currently unsupported. Clamping to 0.\n", log_id(module), log_id(cell));
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log_warning("Module '%s' contains specify cell '%s' with T_LIMIT_MAX < 0 which is currently unsupported. Clamping to 0.\n", module, cell);
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max = 0;
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}
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for (const auto &s : src) {
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