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https://github.com/YosysHQ/yosys
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Refactored uses of log_id()
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parent
89d83a3410
commit
e41b969da2
186 changed files with 1219 additions and 1220 deletions
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@ -1226,7 +1226,7 @@ void RTLIL::Design::add(RTLIL::Module *module)
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mon->notify_module_add(module);
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if (yosys_xtrace) {
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log("#X# New Module: %s\n", log_id(module));
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log("#X# New Module: %s\n", module);
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log_backtrace("-X- ", yosys_xtrace-1);
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}
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}
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@ -1252,7 +1252,7 @@ RTLIL::Module *RTLIL::Design::addModule(RTLIL::IdString name)
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mon->notify_module_add(module);
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if (yosys_xtrace) {
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log("#X# New Module: %s\n", log_id(module));
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log("#X# New Module: %s\n", module);
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log_backtrace("-X- ", yosys_xtrace-1);
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}
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@ -1330,7 +1330,7 @@ void RTLIL::Design::remove(RTLIL::Module *module)
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mon->notify_module_del(module);
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if (yosys_xtrace) {
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log("#X# Remove Module: %s\n", log_id(module));
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log("#X# Remove Module: %s\n", module);
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log_backtrace("-X- ", yosys_xtrace-1);
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}
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@ -1472,22 +1472,22 @@ std::vector<RTLIL::Module*> RTLIL::Design::selected_modules(RTLIL::SelectPartial
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switch (boxes)
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{
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case RTLIL::SB_UNBOXED_WARN:
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log_warning("Ignoring boxed module %s.\n", log_id(it.first));
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log_warning("Ignoring boxed module %s.\n", it.first.unescape());
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break;
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case RTLIL::SB_EXCL_BB_WARN:
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log_warning("Ignoring blackbox module %s.\n", log_id(it.first));
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log_warning("Ignoring blackbox module %s.\n", it.first.unescape());
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break;
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case RTLIL::SB_UNBOXED_ERR:
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log_error("Unsupported boxed module %s.\n", log_id(it.first));
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log_error("Unsupported boxed module %s.\n", it.first.unescape());
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break;
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case RTLIL::SB_EXCL_BB_ERR:
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log_error("Unsupported blackbox module %s.\n", log_id(it.first));
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log_error("Unsupported blackbox module %s.\n", it.first.unescape());
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break;
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case RTLIL::SB_UNBOXED_CMDERR:
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log_cmd_error("Unsupported boxed module %s.\n", log_id(it.first));
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log_cmd_error("Unsupported boxed module %s.\n", it.first.unescape());
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break;
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case RTLIL::SB_EXCL_BB_CMDERR:
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log_cmd_error("Unsupported blackbox module %s.\n", log_id(it.first));
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log_cmd_error("Unsupported blackbox module %s.\n", it.first.unescape());
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break;
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default:
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break;
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@ -1496,13 +1496,13 @@ std::vector<RTLIL::Module*> RTLIL::Design::selected_modules(RTLIL::SelectPartial
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switch(partials)
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{
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case RTLIL::SELECT_WHOLE_WARN:
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log_warning("Ignoring partially selected module %s.\n", log_id(it.first));
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log_warning("Ignoring partially selected module %s.\n", it.first.unescape());
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break;
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case RTLIL::SELECT_WHOLE_ERR:
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log_error("Unsupported partially selected module %s.\n", log_id(it.first));
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log_error("Unsupported partially selected module %s.\n", it.first.unescape());
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break;
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case RTLIL::SELECT_WHOLE_CMDERR:
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log_cmd_error("Unsupported partially selected module %s.\n", log_id(it.first));
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log_cmd_error("Unsupported partially selected module %s.\n", it.first.unescape());
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break;
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default:
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break;
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@ -2796,14 +2796,14 @@ bool RTLIL::Module::has_processes() const
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bool RTLIL::Module::has_memories_warn() const
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{
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if (!memories.empty())
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log_warning("Ignoring module %s because it contains memories (run 'memory' command first).\n", log_id(this));
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log_warning("Ignoring module %s because it contains memories (run 'memory' command first).\n", this);
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return !memories.empty();
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}
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bool RTLIL::Module::has_processes_warn() const
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{
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if (!processes.empty())
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log_warning("Ignoring module %s because it contains processes (run 'proc' command first).\n", log_id(this));
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log_warning("Ignoring module %s because it contains processes (run 'proc' command first).\n", this);
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return !processes.empty();
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}
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@ -3095,7 +3095,7 @@ void RTLIL::Module::connect(const RTLIL::SigSig &conn)
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}
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if (yosys_xtrace) {
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log("#X# Connect (SigSig) in %s: %s = %s (%d bits)\n", log_id(this), log_signal(conn.first), log_signal(conn.second), GetSize(conn.first));
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log("#X# Connect (SigSig) in %s: %s = %s (%d bits)\n", this, log_signal(conn.first), log_signal(conn.second), GetSize(conn.first));
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log_backtrace("-X- ", yosys_xtrace-1);
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}
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@ -3118,7 +3118,7 @@ void RTLIL::Module::new_connections(const std::vector<RTLIL::SigSig> &new_conn)
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mon->notify_connect(this, new_conn);
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if (yosys_xtrace) {
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log("#X# New connections vector in %s:\n", log_id(this));
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log("#X# New connections vector in %s:\n", this);
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for (auto &conn: new_conn)
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log("#X# %s = %s (%d bits)\n", log_signal(conn.first), log_signal(conn.second), GetSize(conn.first));
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log_backtrace("-X- ", yosys_xtrace-1);
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