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https://github.com/YosysHQ/yosys
synced 2026-05-21 01:19:39 +00:00
Refactored uses of log_id()
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parent
89d83a3410
commit
e41b969da2
186 changed files with 1219 additions and 1220 deletions
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@ -78,7 +78,7 @@ struct HierDirtyFlags
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for (Cell *cell : module->cells()) {
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Module *mod = module->design->module(cell->type);
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if (mod) children[cell->name] = new HierDirtyFlags(mod, cell->name, this,
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prefix + cid(cell->name) + ".", log_prefix + "." + prefix + log_id(cell->name));
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prefix + cid(cell->name) + ".", log_prefix + "." + prefix + cell->name.unescape());
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}
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}
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@ -354,23 +354,23 @@ struct SimplecWorker
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struct_declarations.push_back(" // Input Ports");
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for (Wire *w : mod->wires())
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if (w->port_input)
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struct_declarations.push_back(stringf(" %s %s; // %s", sigtype(w->width), cid(w->name), log_id(w)));
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struct_declarations.push_back(stringf(" %s %s; // %s", sigtype(w->width), cid(w->name), w));
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struct_declarations.push_back("");
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struct_declarations.push_back(" // Output Ports");
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for (Wire *w : mod->wires())
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if (!w->port_input && w->port_output)
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struct_declarations.push_back(stringf(" %s %s; // %s", sigtype(w->width), cid(w->name), log_id(w)));
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struct_declarations.push_back(stringf(" %s %s; // %s", sigtype(w->width), cid(w->name), w));
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struct_declarations.push_back("");
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struct_declarations.push_back(" // Internal Wires");
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for (Wire *w : mod->wires())
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if (!w->port_input && !w->port_output)
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struct_declarations.push_back(stringf(" %s %s; // %s", sigtype(w->width), cid(w->name), log_id(w)));
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struct_declarations.push_back(stringf(" %s %s; // %s", sigtype(w->width), cid(w->name), w));
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for (Cell *c : mod->cells())
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if (design->module(c->type))
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struct_declarations.push_back(stringf(" struct %s_state_t %s; // %s", cid(c->type), cid(c->name), log_id(c)));
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struct_declarations.push_back(stringf(" struct %s_state_t %s; // %s", cid(c->type), cid(c->name), c));
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struct_declarations.push_back(stringf("};"));
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struct_declarations.push_back("#endif");
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@ -391,7 +391,7 @@ struct SimplecWorker
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log_assert(y.wire);
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funct_declarations.push_back(util_set_bit(work->prefix + cid(y.wire->name), y.wire->width, y.offset, expr) +
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stringf(" // %s (%s)", log_id(cell), log_id(cell->type)));
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stringf(" // %s (%s)", cell, cell->type.unescape()));
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work->set_dirty(y);
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return;
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@ -418,7 +418,7 @@ struct SimplecWorker
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log_assert(y.wire);
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funct_declarations.push_back(util_set_bit(work->prefix + cid(y.wire->name), y.wire->width, y.offset, expr) +
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stringf(" // %s (%s)", log_id(cell), log_id(cell->type)));
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stringf(" // %s (%s)", cell, cell->type.unescape()));
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work->set_dirty(y);
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return;
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@ -441,7 +441,7 @@ struct SimplecWorker
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log_assert(y.wire);
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funct_declarations.push_back(util_set_bit(work->prefix + cid(y.wire->name), y.wire->width, y.offset, expr) +
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stringf(" // %s (%s)", log_id(cell), log_id(cell->type)));
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stringf(" // %s (%s)", cell, cell->type.unescape()));
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work->set_dirty(y);
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return;
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@ -466,7 +466,7 @@ struct SimplecWorker
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log_assert(y.wire);
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funct_declarations.push_back(util_set_bit(work->prefix + cid(y.wire->name), y.wire->width, y.offset, expr) +
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stringf(" // %s (%s)", log_id(cell), log_id(cell->type)));
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stringf(" // %s (%s)", cell, cell->type.unescape()));
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work->set_dirty(y);
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return;
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@ -490,13 +490,13 @@ struct SimplecWorker
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log_assert(y.wire);
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funct_declarations.push_back(util_set_bit(work->prefix + cid(y.wire->name), y.wire->width, y.offset, expr) +
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stringf(" // %s (%s)", log_id(cell), log_id(cell->type)));
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stringf(" // %s (%s)", cell, cell->type.unescape()));
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work->set_dirty(y);
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return;
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}
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log_error("No C model for %s available at the moment (FIXME).\n", log_id(cell->type));
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log_error("No C model for %s available at the moment (FIXME).\n", cell->type.unescape());
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}
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void eval_dirty(HierDirtyFlags *work)
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@ -517,7 +517,7 @@ struct SimplecWorker
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if (chunk.wire == nullptr)
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continue;
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if (verbose)
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log(" Propagating %s.%s[%d:%d].\n", work->log_prefix, log_id(chunk.wire), chunk.offset+chunk.width-1, chunk.offset);
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log(" Propagating %s.%s[%d:%d].\n", work->log_prefix, chunk.wire, chunk.offset+chunk.width-1, chunk.offset);
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funct_declarations.push_back(stringf(" // Updated signal in %s: %s", work->log_prefix, log_signal(chunk)));
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}
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@ -539,8 +539,8 @@ struct SimplecWorker
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work->parent->set_dirty(parent_bit);
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if (verbose)
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log(" Propagating %s.%s[%d] -> %s.%s[%d].\n", work->log_prefix, log_id(bit.wire), bit.offset,
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work->parent->log_prefix.c_str(), log_id(parent_bit.wire), parent_bit.offset);
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log(" Propagating %s.%s[%d] -> %s.%s[%d].\n", work->log_prefix, bit.wire, bit.offset,
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work->parent->log_prefix.c_str(), parent_bit.wire, parent_bit.offset);
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}
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for (auto &port : bit2cell[work->module][bit])
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@ -556,12 +556,12 @@ struct SimplecWorker
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child->set_dirty(child_bit);
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if (verbose)
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log(" Propagating %s.%s[%d] -> %s.%s.%s[%d].\n", work->log_prefix, log_id(bit.wire), bit.offset,
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work->log_prefix.c_str(), log_id(std::get<0>(port)), log_id(child_bit.wire), child_bit.offset);
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log(" Propagating %s.%s[%d] -> %s.%s.%s[%d].\n", work->log_prefix, bit.wire, bit.offset,
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work->log_prefix.c_str(), std::get<0>(port), child_bit.wire, child_bit.offset);
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} else {
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if (verbose)
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log(" Marking cell %s.%s (via %s.%s[%d]).\n", work->log_prefix, log_id(std::get<0>(port)),
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work->log_prefix.c_str(), log_id(bit.wire), bit.offset);
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log(" Marking cell %s.%s (via %s.%s[%d]).\n", work->log_prefix, std::get<0>(port),
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work->log_prefix.c_str(), bit.wire, bit.offset);
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work->set_dirty(std::get<0>(port));
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}
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}
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@ -576,10 +576,10 @@ struct SimplecWorker
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if (cell == nullptr || topoidx.at(cell) < topoidx.at(c))
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cell = c;
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string hiername = work->log_prefix + "." + log_id(cell);
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string hiername = work->log_prefix + "." + cell->name.unescape();
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if (verbose)
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log(" Evaluating %s (%s, best of %d).\n", hiername, log_id(cell->type), GetSize(work->dirty_cells));
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log(" Evaluating %s (%s, best of %d).\n", hiername, cell->type.unescape(), GetSize(work->dirty_cells));
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if (activated_cells.count(hiername))
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reactivated_cells.insert(hiername);
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@ -618,8 +618,8 @@ struct SimplecWorker
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if (verbose)
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log(" Propagating alias %s.%s[%d] -> %s.%s[%d].\n",
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work->log_prefix.c_str(), log_id(canonical_bit.wire), canonical_bit.offset,
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work->log_prefix.c_str(), log_id(bit.wire), bit.offset);
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work->log_prefix.c_str(), canonical_bit.wire, canonical_bit.offset,
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work->log_prefix.c_str(), bit.wire, bit.offset);
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}
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work->sticky_dirty_bits.clear();
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@ -716,7 +716,7 @@ struct SimplecWorker
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{
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create_module_struct(mod);
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HierDirtyFlags work(mod, IdString(), nullptr, "state->", log_id(mod->name));
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HierDirtyFlags work(mod, IdString(), nullptr, "state->", mod->name.unescape());
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make_init_func(&work);
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make_eval_func(&work);
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