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Blocking tasks are now capital TODO (compared to non-blocking todo).
Updated some of the todos.
Added note about which intel synth does which families.
Rename extended Yosys universe to Yosys family.
Added brief text to landing page, and also a note about the restructure and where to find old docs.
Moved todolist above ToC in preparation for disabling it in the config (so that it doesn't need it's own header).

Fixed pdf build, was previously breaking on trying to include the svg badges.
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Krystine Sherwin 2023-12-12 12:05:45 +13:00
parent 4ecceaed44
commit e34a25ea27
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15
docs/source/getting_started/example_synth.rst
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@ -23,8 +23,9 @@ A simple counter
.. role:: yoscrypt(code)
:language: yoscrypt
.. todo:: consider changing simple counter example for something with memory
using e.g. synth_ice40 to cover more of the synth flow
.. TODO:: move current example synth as mapping to cell libraries
replace with a walk through of synth_ice40
This section covers an `example project`_ available in
``docs/source/code_examples/intro/``. The project contains a simple ASIC
@ -77,7 +78,7 @@ stopping the following commands from trying to work on them. By passing the
that if the design includes any non-blackbox modules without an implementation
it should return an error.
.. todo:: more on why :cmd:ref:`hierarchy` is important
.. TODO:: more on why :cmd:ref:`hierarchy` is important
.. note::
@ -147,7 +148,7 @@ Much better. We can now see that the ``$dff`` and ``$mux`` cells have been
replaced with a single ``$sdffe``, using the built-in enable and reset ports
instead.
.. todo:: a bit more on :cmd:ref:`opt` here
.. TODO:: a bit more on :cmd:ref:`opt` here
At this stage of a synthesis flow there are a few other commands we could run.
First off is :cmd:ref:`flatten`. If we had any modules within our ``counter``,
@ -176,7 +177,7 @@ Such elements have to be inferred from patterns in the design and there are
special passes for each. Detection of these patterns can also be affected by
optimizations and other transformations done previously.
.. todo:: talk more about DSPs (and their associated commands)
.. TODO:: talk more about DSPs (and their associated commands)
Some of the commands we might use here are:
@ -194,7 +195,7 @@ Some of the commands we might use here are:
Logic gate mapping
~~~~~~~~~~~~~~~~~~
.. todo:: example_synth mapping to gates
.. TODO:: example_synth mapping to gates
:yoscrypt:`techmap` - Map coarse-grain RTL cells (adders, etc.) to fine-grain
logic gates (AND, OR, NOT, etc.).
@ -217,7 +218,7 @@ cells used.
Mapping to hardware
~~~~~~~~~~~~~~~~~~~
.. todo:: example_synth mapping to hardware
.. TODO:: example_synth mapping to hardware
:ref:`cmos_lib`