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Added handling of bool-output cells to "wreduce"
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@ -347,6 +347,17 @@ struct WreducePass : public Pass {
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if (module->has_processes_warn())
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if (module->has_processes_warn())
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continue;
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continue;
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for (auto c : module->selected_cells())
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if (c->type.in({"$reduce_and", "$reduce_or", "$reduce_xor", "$reduce_xnor", "$reduce_bool",
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"$lt", "$le", "$eq", "$ne", "$eqx", "$nex", "$ge", "$gt",
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"$logic_not", "$logic_and", "$logic_or"}) && GetSize(c->getPort("\\Y")) > 1) {
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SigSpec sig = c->getPort("\\Y");
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c->setPort("\\Y", sig[0]);
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c->setParam("\\Y_WIDTH", 1);
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sig.remove(0);
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module->connect(sig, Const(0, GetSize(sig)));
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}
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WreduceWorker worker(&config, module);
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WreduceWorker worker(&config, module);
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worker.run();
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worker.run();
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}
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}
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