From e2f9a31b8d192eafa5a0bad7252104746c8ac8a6 Mon Sep 17 00:00:00 2001 From: "Emil J. Tywoniak" Date: Tue, 17 Mar 2026 11:28:10 +0100 Subject: [PATCH] signorm: skip const when fixing fanout --- kernel/rtlil_bufnorm.cc | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/kernel/rtlil_bufnorm.cc b/kernel/rtlil_bufnorm.cc index 58eee4570..e6c73f64a 100644 --- a/kernel/rtlil_bufnorm.cc +++ b/kernel/rtlil_bufnorm.cc @@ -143,7 +143,8 @@ struct RTLIL::SigNormIndex continue; int i = 0; for (auto bit : sig) - fanout[bit].insert(PortBit(cell, port, i++)); + if (bit.is_wire()) + fanout[bit].insert(PortBit(cell, port, i++)); } } } @@ -964,6 +965,8 @@ void RTLIL::Cell::unsetPort(RTLIL::IdString portname) auto &fanout = module->sig_norm_index->fanout; int counter = 0; for (auto bit : conn_it->second) { + if (!bit.is_wire()) + continue; int i = counter++; auto found = fanout.find(bit); log_assert(found != fanout.end()); @@ -1091,6 +1094,8 @@ void RTLIL::Cell::setPort(RTLIL::IdString portname, RTLIL::SigSpec signal) auto &fanout = module->sig_norm_index->fanout; int counter = 0; for (auto bit : conn_it->second) { + if (!bit.is_wire()) + continue; int i = counter++; auto found = fanout.find(bit); log_assert(found != fanout.end()); @@ -1112,7 +1117,8 @@ void RTLIL::Cell::setPort(RTLIL::IdString portname, RTLIL::SigSpec signal) auto &fanout = module->sig_norm_index->fanout; int i = 0; for (auto bit : signal) - fanout[bit].insert(PortBit(this, portname, i++)); + if (bit.is_wire()) + fanout[bit].insert(PortBit(this, portname, i++)); } else if (GetSize(signal)) { Wire *w = signal.as_wire(); log_assert(w->driverCell_ == nullptr);