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Add support for cell arrays

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This commit is contained in:
Clifford Wolf 2014-06-07 11:48:50 +02:00
parent 0b1ce63a19
commit e275e8eef9
6 changed files with 70 additions and 1 deletions
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7
frontends/verilog/parser.y
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@ -634,6 +634,13 @@ single_cell:
astbuf2->str = *$1;
delete $1;
ast_stack.back()->children.push_back(astbuf2);
} '(' cell_port_list ')' |
TOK_ID non_opt_range {
astbuf2 = astbuf1->clone();
if (astbuf2->type != AST_PRIMITIVE)
astbuf2->str = *$1;
delete $1;
ast_stack.back()->children.push_back(new AstNode(AST_CELLARRAY, $2, astbuf2));
} '(' cell_port_list ')';
prim_list: