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Update yosys from upstream

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This commit is contained in:
Akash Levy 2024-06-15 14:23:24 -07:00
commit e23e33441f
13 changed files with 95 additions and 23 deletions
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6
frontends/verific/verific.cc
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@ -3687,6 +3687,12 @@ struct VerificPass : public Pass {
verific_error_msg.clear();
log_cmd_error("Reading Verilog/SystemVerilog sources failed.\n");
}
char* fn;
int i = 0;
FOREACH_ARRAY_ITEM(&file_names, i, fn) {
free(fn);
}
set_modules_to_blackbox(map, work, flag_lib);
verific_import_pending = true;
goto check_error;